完整後設資料紀錄
DC 欄位語言
dc.contributor.author楊學之en_US
dc.contributor.authorHsueh-Chih Yangen_US
dc.contributor.author董蘭榮en_US
dc.contributor.authorLan-Rong Dungen_US
dc.date.accessioned2014-12-12T01:43:05Z-
dc.date.available2014-12-12T01:43:05Z-
dc.date.issued2006en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009112820en_US
dc.identifier.urihttp://hdl.handle.net/11536/45813-
dc.description.abstract隨著可攜式電子產品需求的增加,例如筆記型電腦、數位通訊設備、數位視訊設備和音訊播放器等,能量與成本的考量變得非常重要。可攜式電子產品有尺寸上的限制,進而限制了電池電量與使用時間。這些原因讓數位電路設計的目標有了改變,從追求效能到專注在限制上;從追求最大的處理速度到追求更有效地使用資源。此論文闡述在有限的資源情況下,如何有效地去最佳化電路設計的面積與達到低功率的設計,我們提出了一個有限資源情況下之低功率高階合成方法 之外,並且提出了在有限資源情況下之硬體折疊架構與一個低功率的渦輪碼解碼方法。本論文中提出之有限資源低功率高階合成方法與有限資源之硬體折疊架構在與相關國際期刊文獻比較之後發現在功率消耗上確實有較佳的表現。有限資源低功率高階合成方法的相關文獻中,極少有使用到演算法轉換去最佳化排程結果的文獻,使用此演算法轉換的效果非常顯著。所提出之有限資源之硬體折疊架構也是目前文獻中最節省暫存器與最少暫存器切換的最佳設計。zh_TW
dc.description.abstractThe primary design objective of computing and communication systems has been targeting on the following performance metrics: the speed of signal processing, the rate of communications, and the optimization of quality of service. For portable embedded computing systems and wireless systems deployed on a large scale and untethered to power sources, practical considerations dictate a different design regime, one that should be dominated by energy and cost constraints. Batteries are serving as a dedicated energy resource. The requirement of portability places severe restrictions on size and weight, which in turn limits the amount of energy that is continuously available to maintain system operability. For these reasons, a fundamental shift in design paradigm is necessary: from focusing on performance to focusing on constraints, from maximizing data rate to maximizing resource efficiency. This dissertation illuminates the impact of resource constraints on the design methodologies of VLSI signal processing and communication applications, proposes several design methodologies in the resource-constrained low-power high-level synthesis (HLS), the limited-resource folding techniques, and the power efficient turbo decoder, and tries to stimulate interests in the VLSI signal processing in reformulating and revisiting classic VLSI signal processing problems under new constraints and exploring the role of signal processing in exciting new applications. Based on the proposed techniques, we have designed and implemented two power-efficient chips, a pulse shaping FIR filter for WCDMA and a limited-resource DWT processor.en_US
dc.language.isoen_USen_US
dc.subject多電壓排程zh_TW
dc.subject演算法轉換zh_TW
dc.subject折疊技巧zh_TW
dc.subject低功率設計zh_TW
dc.subject渦輪碼zh_TW
dc.subjectmultiple-voltage schedulingen_US
dc.subjectalgorithmic transformationen_US
dc.subjectfolding techniqueen_US
dc.subjectlow-power designen_US
dc.subjectturbo codeen_US
dc.title有效利用資源之低功率數位訊號處理設計zh_TW
dc.titleOn Resource-Efficient Low-Power VLSI Signal Processing Designen_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
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