完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 張家瑋 | en_US |
dc.contributor.author | Chang Chia-Wei | en_US |
dc.contributor.author | 陳伯寧 | en_US |
dc.contributor.author | Chen Po-Ning | en_US |
dc.date.accessioned | 2014-12-12T01:43:29Z | - |
dc.date.available | 2014-12-12T01:43:29Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009113506 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/45891 | - |
dc.description.abstract | 在這篇論文中,我們提出了一各系統性的位元單位分析法應用在高階調變符號解碼量度上.利用這各新的位元分析法改善系統效能當資料流被2進位編碼且經過交換機制再調變.很明顯的使用我們提出的解碼架構當應用在16QAM,64QAM,256QAM和1024QAM相對於硬性解碼有3.9 dB, 5.1 dB and 6.3 dB 當位元錯誤率在10的-5次方.最後我們還針對系統的不完整性,譬如量化誤差,自動增益控制和相位誤差的影響.一各硬體的實現架構也一起被建立起來 | zh_TW |
dc.description.abstract | In this thesis, we present a systematic approach for bit-wise decomposition of M-ary sym-bol metric. The decomposed bit metrics can be applied to improve the performance of a system where the information sequence is binary-coded and interleaved before M-ary mod-ulated. A straightforward receiver designed for certain system is to de-map or quantize the received M-ary symbol into its binary somorphism to facilitate the subsequent bit-based manipulation, such as hard-decision decoding. In stead, with a bit-wise decomposition of M-ary symbol metric, a soft-decision decoder can be readily used to achieve a better sys-tem performance. The proposed approach is to decompose the symbol-based maximum-likelihood (ML) metric by equating a number of specific equations that are drawn from squared-error criterion. Systematic solutions for exemplified 16QAM, 64QAM, 256QAM and 1024QAM are then established. Simulation results based on IEEE 802.11a/g system setting show that at the bit-error-rate of 10^(-5), the proposed bit-wise decomposed metric can provide 3.0 dB, 3.9 dB, 5.1 dB and 6.3 dB improvement over the oncatenation of binary-demapper/deinterleaver/hard-decision-decoder for 16QAM, 64QAM, 256QAM and 1024QAM symbols, respectively under the AWGN channel. Further empirical study on sys-tem imperfection implies that the proposed bit-wise decomposed metric also improves the system robustness against gain-mismatch and phase-noise. A realization structure for our proposed systematic recursive formula then is established. Different from conventional struc-ture where de-interleaver and decoder are separate circuits, our structure de-interleaves and decodes at the same time; and hence, memory space and processing latency can be reduced. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 軟性分解 | zh_TW |
dc.subject | 最大相似度 | zh_TW |
dc.subject | 正交振幅調變碼 | zh_TW |
dc.subject | Soft-desicion | en_US |
dc.subject | Maximum-likelyhood | en_US |
dc.subject | Qam modulation | en_US |
dc.title | 高階調變符號解碼量度的位元單位分解法則之研究 | zh_TW |
dc.title | Bit-wise Decomposition of M-ary Symbol Metric | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |