AN ANALYTIC IV MODEL FOR LIGHTLY DOPED DRAIN (LDD) MOSFET DEVICES

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DC 欄位	值	語言
dc.contributor.author	HUANG, GS	en_US
dc.contributor.author	WU, CY	en_US
dc.date.accessioned	2014-12-08T15:06:04Z	-
dc.date.available	2014-12-08T15:06:04Z	-
dc.date.issued	1987-06-01	en_US
dc.identifier.issn	0018-9383	en_US
dc.identifier.uri	http://hdl.handle.net/11536/4639	-
dc.language.iso	en_US	en_US
dc.title	AN ANALYTIC IV MODEL FOR LIGHTLY DOPED DRAIN (LDD) MOSFET DEVICES	en_US
dc.type	Article	en_US
dc.identifier.journal	IEEE TRANSACTIONS ON ELECTRON DEVICES	en_US
dc.citation.volume	34	en_US
dc.citation.issue	6	en_US
dc.citation.spage	1311	en_US
dc.citation.epage	1322	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	工學院	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	College of Engineering	en_US
dc.identifier.wosnumber	WOS:A1987H779400012	-
dc.citation.woscount	17	-
顯示於類別：	期刊論文

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