覆晶錫銀銲錫接點於定溫不同電流密度下之電遷移失效模式研究

Abstract

隨著消費性電子產品小型化之趨勢，使得覆晶封裝技術也進而微小化。然而，當銲錫凸塊尺寸的微縮化相當於受到電流密度的改變，而本研究將討論銲錫凸塊於不同電流密度下所受電遷移之影響。 本研究於無鉛覆晶錫銀銲錫接點於100℃的溫度下，電流分別通以0.8A、1.0A及1.2A，並觀察各階段之試片剖面，以分析各銲錫凸塊之失效模式。在實驗結果中，於電流未流經之凸塊發現銅墊層受熱遷移效應造成之孔洞；在電子流向上之凸塊更於電流聚集區驗證出(Cu,Ni)6Sn5的累積；而電子流向下之凸塊於較高電流密度下，不僅發現鬆餅狀孔洞之生成，亦有介金屬化合物破壞之現象。

As the size of consumptive electronic products continues to shrink, Flip Chip ICs also have to miniaturization. However, shrinking the size of solder bump is similar to the change of current density. We will discuss the effect of solder bump by elecromigration under different current density. In this study, we applied current stress of 0.8A、1.0A and 1.2A respectively on lead-free SnAg solder joints at 100℃. And we observed the cross-section of specimen for various stages and analyzed the failure modes for each solder bump . In experimental result, for the bump without current stressing, we found the formation of void causing by Cu UBM consumption which was affected by thermomigration effect. And we demonstrated (Cu,Ni)6Sn5 accumulation in current crowding region for the bump with an upward electron flow. Then, we found not only the formation of pancake-type void, but also destruction of IMC on the bump with a higher current density downward electron flow.