標題: | 以濺鍍/無毒硒化製程製作銅銦鎵硒薄膜太陽能電池 Fabrication of copper-indium-gallium-selenide thin film solar cell by sputtering and non-toxic selenization methods |
作者: | 黃哲瑄 Huang, Che-Hsuan 謝嘉民 盧廷昌 Shieh, Jia-Min Lu, Tien-chang 照明與能源光電研究所 |
關鍵字: | 薄膜太陽能電池;無毒硒化;大面積;CIGS;non-toxic selenization;large-area |
公開日期: | 2010 |
摘要: | 在鍍製Mo背電極時,採用『高製程壓力+低製程壓力』兩層薄膜的結構,高壓製備之薄膜可提供高附著力的薄膜,而低壓製備之薄膜則可提供低電阻率的薄膜,量測其電性可得2.12x10-5Ω-cm。Mo/CIGS接面部分,量測Mo/CIGS/Mo結構的I-V曲線,結果證實本研究採用的Mo與CIGS薄膜確實可形成良好的 Mo/CIGS歐姆接面。
主吸收層性質受到預製層與硒化製程的影響,製程溫度的提升可使薄膜結晶性提高,參考成分分析的結果,可歸納出結晶尺寸和銅元素的比例呈現正相關。
製程溫度提高可有效抑制薄膜拉曼訊號中的Cu2Se訊號以及CA訊號,也可有效減少薄膜中二次相的存在。改變降溫時間的實驗結果可以歸納出20分鐘以上的降溫時間可有效抑制二次相的生長。另外於本研究中,我們已可製備出均勻度佳的大面積(30cm x 40cm)Mo/CIGS結構。
因為Cu2Se的存在會嚴重影響元件效能,在硒化製程後以KCN蝕刻CIGS薄膜表面,此蝕刻製程會造成CIGS形成粗糙表面,造成後續CdS製程的覆蓋率不佳,在確保Mo/CIGS部分差異不大的前提下進行CdS層的最佳化。可歸納出42-47分鐘的沉積時間下得到60-80nm的CdS薄膜為最佳參數。
對元件效率進行分析,在變預製層成分的比較中,開路電壓和GGI成正比,而CGI比值低的薄膜則會使接面理想因子上升,呈現複合電流主導的趨勢。在比較照光態與暗態的實驗中,照光後的元件在並聯電導的比較上比暗態的元件高出一個數量級,而其它參數則呈現微幅上升的結果。變化峰值溫度的元件結果中,溫度與效率則無明顯直接相關性。
量測ZnO以及AZO的吸收係數推算能隙,分別得到ZnO及AZO的能隙為3.19eV以及3.55eV,並比較外部量子效應,可以有效分析元件結構造成的量子轉換效率損失,造成損失主要來自能帶結構、反射以及電性的損失。 The bi-layer structure of Molybdenum back contact was deposited under higher working pressure and lower working pressure respectively. The one deposited at higher working pressure had good adhesion, and the one deposited at lower working pressure had low resistivity. Mo with bi-layer structure had a low resistivity 2.12x10-5Ω-cm. By measuring the I-V curve for Mo/CIGS/Mo structure, the results shows that Mo/CIGS interface form a good ohmic contact. The properties of CIGS absorber layers were affected by precursors and selenization process. As the process temperature increased, the CIGS film had larger grain size. Compared the analysis of composition, we could sum up the Cu composition was coherent with grain size. From the Raman spectrum analysis, high process temperature could suppress Cu2Se signal and CIGS-CA signal. The various cooling time experiment showed the cooling time longer than 20 min could suppress the formation of binary compounds. The large-area (30cm x 40cm) Mo/CIGS could be also prepared by sputtering/non-toxic selenization process. Because the Cu2Se was harmful for device, it had to be removed from CIGS films’ surface. KCN etching could remove Cu2Se from CIGS films’ surface but the etching process caused the CIGS films’ surface roughed. Rough surface caused poor CdS coverage. To estimate the influence of roughness, the following study was to optimize CdS layer. The optimization results could sum up the best deposition time was 42-47 min with thickness 60-80nm. We studied various composition of CIGS film. Open voltage had positive relativity with Ga/(Ga+In) ratio (GGI). However the lower GGI ratio could increase the ideal factor, it showed the recombination current dominative. Compare the performance of the devices under illuminate and in the dark. The shunt conductance under illuminate was higher for one order of magnitude than in the dark. We measured the absorption coefficient to calculate the band gap of ZnO and AZO. The band gap of ZnO and AZO was 3.19eV and 3.55eV respectively. Compared with EQE plot, we could effectively improve the performance of the device. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079805503 http://hdl.handle.net/11536/46652 |
顯示於類別: | 畢業論文 |