可相容高工作電壓且具有負載適應性之抑制癲癇發作電流刺激器設計

Abstract

電刺激技術已是一種常見的醫療方式，例如功能性電刺激 (functional electrical stimulation, FET) 與治療性電刺激 (therapeutic electrical stimulation, TES)。透過電流訊號流過患者的待刺激部位，可使患者恢復部分身體的機能。而隨著積體電路製程的微縮化，整合智慧型仿生系統於單晶片的目標已變得可行，此系統單晶片可植入動物體，以對患部進行電刺激。對植入性晶片而言，設計時的主要考量為安全性、可靠度與功率消耗。 本文所提出的電路為可相容高工作電壓且具有負載適應性之抑制癲癇發作電流刺激器。由於在刺激器輸出刺激電流時，輸出端會有將近十伏特的高壓產生，為了承受輸出端的高壓，過去的刺激器電路都是使用高壓製程來實作，而本刺激器電路為了與智慧型仿生系統中的其他電路做單晶片整合，因此必須使用低壓製程來實作。本刺激器透過電路設計的技巧，使其能以低壓製程元件來承受高壓，而電晶體不會面臨電性過壓的情形。此外，當待刺激部位的阻抗在設計的範圍內變化時，電流刺激器亦能提供穩定的刺激電流。最後，本設計已由動物實驗獲得驗證，刺激器可有效地抑制老鼠的癲癇病症發作。

The treatment of using a stimulus driver has been investigated and verified. By stimulating the nerves may recover the patient’s physical functions. It can be applied to functional electrical stimulation and therapeutic electrical stimulation. As the CMOS process developed, using an implantable device to provide stimulus current can be accomplished. The main considerations of designing an implantable device are safety, reliability, and power consumption. The proposed stimulus driver is utilized to suppress epileptic seizure. Due to the loading impedance is hundreds kΩ and the stimulus current is tens μA, the voltage at the output of stimulus driver is ~10 V. Conventional works are fabricated in high-voltage process in order to sustain the high voltage at output of stimulus driver. To be integrated with other circuits into SoC, this work is implemented in low-voltage process. By designing the structure, this work fabricated in 0.18-μm 1.8-V/3.3-V CMOS process is able to sustain high voltage (~10 V) without gate-oxide overstress. It can provide stimulus current ~40 μA as the loading impedance varies from 100 kΩ to 250 kΩ. The function of this work has been verified in the animal test experiment.