標題: MIMO-OFDM系統之偵測與解碼-設計與實現
Joint Detection and Viterbi Decoder for MIMO-OFDM Systems-Design and Implementation
作者: 李峰宇
Fong Yu Lee
吳文榕
Wen-Rong Wu
電信工程研究所
關鍵字: 偵測;解碼;Detection;Viterbi Decoding
公開日期: 2004
摘要: 傳統上,在MIMO-OFDM系統中V-BLAST及Viterbi解碼器是分開考量的。由於V-BLAST演算法會在Viterbi解碼之前做符元(symbol)決策(decision),因此高錯誤率便往往導致嚴重錯誤延展(error propagation)問題。在本論文中,我們發展出一個結合傳送器之位元資料流先前排序(stream pre-ordering)、接收器之V-BLAST處理及Viterbi解碼器的系統來將錯誤率最小化。在本方法中,首先接收器會將能使V-BLAST有最大效能(在每個子載波上)的解碼順序回傳給傳送器。傳送器便根據這個順序將位元資料流做先前排序。接收訊號之後,接收器便將接收訊號做反排序的動作再經過V-BLAST處理及Viterbi解碼。模擬結果也証實了此演算法的確能達到較佳的效能。在IEEE 802.11n WLAN系統下,我們也使用了FPGA設計流程實現了MMSE估測器、軟性反對映(soft-bit demapper)及Viterbi解碼器。
Conventionally, the V-BLAST and Viterbi decoding algorithms are considered separately in MIMO-OFDM systems. Since the V-BLAST algorithm makes its own symbol decisions before Viterbi decoding, the performance of the overall system is not satisfactory. If the V-BLAST algorithm can use the decisions from the Viterbi decoder, the performance can be enhanced. In this thesis, we propose a scheme to realize this idea. The distinct feature of the proposed scheme is a pre-ordering technique allowing an optimal combination of V-BLAST processing and Viterbi decoding. Simulations conform that the proposed algorithm significantly outperforms the conventional approach. Using an FPGA design flow, we also implement an IEEE 802.11n back-end receiver including an MMSE estimator, a soft-bit demapper, and a Viterbi decoder.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009113627
http://hdl.handle.net/11536/47157
顯示於類別:畢業論文


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