AlGaN/GaN HEMT閘極驅動電路設計與實現

Abstract

本論文提出一適合氮化鎵電晶體，且完整的上下橋閘極驅動電路。不同於一般加強型驅動電路，此架構是針對空乏型電晶體設計，可提供負的閘－源極電壓，將功率電晶體關閉。 在上橋驅動電路中，使用自舉式電路提供功率元件穩定的閘－源極電壓；再利用位準調節電路將邏輯訊號轉換成適當的控制訊號。為了提升此電路的效能，本研究設計一個閂鎖電路，並與位準調節電路結合，減少其開啟的時間，以降低功率損耗。由於空乏型元件Normally-on的特性，導致自舉電容無法正常充電，本研究也設計出兩種啟動電路，藉此控制元件的啟動時間，使自舉電容有足夠的時間充電。 此電路經由HSPICE模擬驗證後，利用離散元件實際完成，並在100kHz/24V的條件下驅動氮化鎵電晶體。由模擬與實驗的波形顯示，使用此驅動電路可正常切換氮化鎵電晶體的開關狀態。

This thesis proposed a proper and complete high/low side gate drive circuit for GaN transistors. Unlike the conventional enhancement mode driver, this circuit designed for the depletion mode transistors, providing a negative gate-source voltage to turn off the power transistors. In the high side drive circuit, the study used a bootstrap circuit to provide a stable gate-source voltage for the power devices, and then transferred the logic signals into the appropriate control signals by the level shifter. In order to maintain high efficiency and reduce the power consumption of this circuit, the study designed a latch circuit, which combined with the level shifter to decrease the operating time. For the bootstrap capacitor charging problem, which was due to the “normally-on” property of the depletion mode transistor, the study also designed two start-up circuits to control the timing of the initial activation of the devices. Therefore, the bootstrap capacitor would have enough lead time to charge. This circuit verified by HSPICE, completed with discrete components and drove GaN transistors in 100kHz/24V driving condition. The simulation and experiment waveforms showed that the drive circuit can control the on/off state of GaN transistors normally.