不同材料的背電極對溶液製程金屬氧化物薄膜電晶體之特性影響

Abstract

溶液製程的金屬氧化物薄膜電晶體近年來受到大家的重視,一方面是因為其能隙很大且可以形成一層非常透明的薄膜;另一方面是其製程的成本是非常低廉的。然而，其過高的製程敏感性和元件操作穩定性及需要在高溫中退火限制了其在徹底商業化的進程。本論文從一開始如何做出一個金屬氧化物電晶體開始講起，並且為了要改善元件的電性，嘗試了不同的金屬氧化物(ZnO，GZO，IGZO)，且改變不同金屬前驅物混合的比例，以求達到一個極佳化的電性。此外，為了得到一個大於0V的臨界電壓，我們嘗試對混合的金屬氧化物前驅物溶液進行處理，譬如在溶液進行膠融的時候利用磁石高溫攪拌，使前軀物加速反應，或是在手套箱中進行攪拌，結果發現我們可以利用控制上述的變因來偏移臨限電壓。為了能使整個製程控制在較低的溫度，我們也對上述不同的金屬氧化物進行了不同的退火溫度測試並製成了薄膜電晶體並進行電性比較，發現還是IGZO薄膜電晶體在低溫的退火環境下還能量測到較好的電性。 我們使用了上述得到的最佳化的IGZO薄膜電晶體進行了第二段的測試。從濺鍍a-IGZO薄膜電晶體的研究得知，在元件的背表面覆蓋上某些材料會導致遷移率大幅的提升。我們也期待在溶液製程的的IGZO薄膜電晶體也能得到這樣的結果。我們設計不同的覆蓋比率對標準IGZO薄膜電晶體覆蓋了SiO測試，對於IGZO 經過600℃的高溫退火環境的元件，電子遷移率真的如我們所期望的大幅的提升了，從∼2 cm2V-1s-1改善到∼15 cm2V-1s-1。在較低的退火環境下(400℃)，遷移率也有所改善，從∼0.1 cm2V-1s-1改善到∼1 cm2V-1s-1。 除了覆蓋SiO外，我們也在元件上覆蓋孤立的鈣電極，結果發現了元件遷移率除了也會提升以外，臨界電壓會往負大幅的偏移。我們對覆蓋這兩種不同的材料所造成元件的影響做了一些假設，並且希望在未來的研究可以得知其遷移率大幅改善的原因。 這篇論文確實提供了溶液製程金屬氧化物電晶體的方法與特性解釋，並可做為對後來研究的一個相當值得參考的資料。

Solution-processed indium-gallium-zinc-oxide TFTs had been studied for many years. The most attractive is the low cost fabrication processes, high transparency and large band gap. However, the performance on solution processed metal-oxide TFTs is not stable, it need high annealing temperature (>400℃) to achieve high performance device characteristics. Therefore, decreasing the annealing temperature to obtain high performance solution processed metal-oxide TFTs is an important issue, some people proposed that increasing the Gallium concentration will decrease the annealing temperature form >400℃ to 200℃, and increase the annealing time will achieve high performance in low annealing temperature. In this study, we fabricated the conventional thin-film transistor with different composition metal-oxide semiconductors, such as ZnO, GZO, and IGZO. In order to achieve high mobility, bottom-gate metal-oxide TFTs with low annealing temperature, we tested some methods such as adjusting different composition of metal-oxide semiconductor and adjusting different stirring temperature. As a result, we found the best electric characteristic on IGZO thin-film transistor and the annealing temperature could decrease to low than 400℃ and exhibited a mobility of 0.1 cm2V-1s-1. Additionally, we used above best result to cap SiO on the back channel of metal-oxide film, and we found that the mobility increased obviously with increasing the percentage of capping ratio. We also discussed some possible physical mechanism on it. The optimized electric characteristic of indium-gallium-zinc-oxide TFT was attained a mobility around 15 cm2V-1s-1, sub-threshold swing of 0.4 V/decade, on/off ratio of×106 and VT of 0.11 V in high annealing temperature (600℃); we could get a mobility of 1 cm2V-1s-1 in low annealing temperature (400℃). The same result was found in dual gate thin-film transistor with capping Calcium. The physical mechanism was different from capping SiO. Here we discussed a lot of possible mechanisms of indium-gallium-zinc-oxide thin-film transistors and it’s useful for future developing for high performance metal-oxide TFTs.