標題: 模擬輔助調整策略之固態硬碟高效能緩衝區
A Simulation-Assisted Tuning Strategy for SSD Write Buffers
作者: 吳翊誠
Wu, Yi-Cheng
張立平
Chang, Li-Pin
資訊科學與工程研究所
關鍵字: 快閃記憶體;flash memory;write buffer
公開日期: 2011
摘要: 在write buffer的主要功能有兩個1.吸收時間區域性2.收集空間區域性來減緩在NFTL(NAND Flash translation layer)寫入的成本,而在設計write buffer replacement策略時勢必要根據此兩種區域性來做設計。但由於各種不同write pattern裡面的localities不盡相同又必須考慮當下硬體的資源(如write buffer/Log buffer size),在不同situation下所適用的write buffer replacement是不盡相同的。而此篇論文提出利用simulation的方式去找出當下情況所應該使用的write buffer replacement並能自適性的調整replacement策略在不同的workload情況。 而此篇論文的simulation是放在device(firmware)端,因此能夠拿來當作我們simulation的資源非常有限,因此我們必須在拮据的資源下保留少數的資訊去模仿write buffer/NFTLalgorithm的行為並告訴write buffer manager當下所該使用的replacement策略。因此我們被須在資源使用量和準確度上面取得妥協,使得我們的simulation可以在有限的資源下,產生出準確的模擬結果。
Write buffer has two major tasks.One is absorbing temporal locality.The other one is collecting spatial locality.Absorbing temporal locality can reduce hot data.Collecting spatial locality can reduce write traffic of block-leveland hybrid mapping.When people design write buffer replacement strategy will take two localities as designed metric.But different workloads have different write pattern behavior,and people has to consider current resourcehareware can supports.It is hard to strike a balance between temporal locality and patial locality in different workload. This paper proposes a simulation-assisted Tuning strategy for self-adjusting buffer replacement strategy.We put simulation on device(firmware) part,so we have to use few resource to imitate write buffer/NFTL algorithm andinform write buffer manager "what replacement strategy we should use".So we have to make a tradeoff betweenfew resource and simulation's accuracy.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079855623
http://hdl.handle.net/11536/48361
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