標題: | 高介電常數介電質金氧金電容應用於動態記憶體與射頻元件之研究 The Research of Metal-Insulator-Metal Capacitor Using High-k as Dielectrics for DRAM/RF Application |
作者: | 鄭淳護 Chun-Hu Cheng 周長彬 荊鳳德 Chang-Pin Chou Albert Chin 機械工程學系 |
關鍵字: | 金氧金電容;高介電係數介電質;動態隨機存取記憶體;MIM capacitor;hi-k dielectric;DRAM |
公開日期: | 2007 |
摘要: | 隨著超大型積體電路技術的日新月異、元件尺寸的不斷縮微,為配合現今類比、射頻通訊和記憶體元件的發展,金氧金電容(MIM)的研發是刻不容緩的。在各種不同的被動元件中,金氧金電容經常被廣泛的應用在射頻電路裡的阻抗匹配與直流濾波器中﹔而且它們通常佔據了很大比例的電路面積。因此,為了有效降低晶片的面積與成本,提高單位面積的電容值是極為需要的。為了符合未來記憶體元件的高電容密度需求,高介電系數材料的開發似乎是唯一的選擇,但增加介電常數和減少元件厚度所伴隨而來的高漏電,更是目前研究的主要議題之一。而目前已開發和尚在研究的高介電常數材料包含氧化鋁(Al2O3)、氧化鉭(Ta2O5)、氧化鋯(ZrO2)和鈦酸鍶(SrTiO3)等。
雖然,鈦酸鍶介電質(SrTiO3)具有高介電常數(k ~50-200),但小的導帶不連續(conduction band discontinuity)和能帶寬度(bandgap),將易造成較大的漏電。除此之外,鈦酸鍶介電質必須要有結晶相產生才能有較高的介電常數 (k~150-170),而要形成奈米結晶 (nano-crysatl)的鈦酸鍶,則需要較高的製程溫度(>450oC)。
因此,我們針對以上鈦酸鍶介電質所產生的問題,開發出一系列和二氧化鈦相關(TiO2-based)的材料,其中包括了鉿化鈦氧化物(TiHfO)、鑭化鈦氧化物(TiLaO)和鋯化鈦氧化物(TiZrO)。除了之外,我們也成功的發展出一種雙電漿處理(Dual plasma treatment)下電極的方法,我們藉由這個方法搭配這些高介電質材料,成功的開發出高性能的金氧金電容,不但在漏電上有大幅的改善,更改良了電壓電容係數(Voltage coefficient of capacitance)和的溫度電容係數(Temperature coefficient of capacitance)。最後,我們針對鈦酸鍶介電質進行定電壓應力測試(constant voltage stress test),去觀察其電性和類比特性上的變化,進而推估元件的可靠度。此一電容可靠度測試的方法將可用來作為未來金氧金電容在動態記憶體及高頻應用上的評估。 According to International Technology Roadmap for Semiconductors (ITRS), the continuous increasing capacitance density is required to scale down the device size of Metal-Insulator-Metal (MIM) capacitors that are widely used for Analog, RF and DRAM functions. To meet these requirements, the using higher k dielectric is the only choice since the decreasing dielectric thickness increases the unwanted leakage current exponentially. To achieve this goal the only choice is to increase the □ value of the dielectrics, which have evolved from Al2O3, Ta2O5 (k ~25), ZrO2 (k ~30), to SrTiO3 (k~50-200). Although SrTiO3 has a large dielectric (k~50-200), the small conduction band offset (-0.1eV) and bandgap to lead larger leakage current is an important issue. And SrTiO3 showed higher k values by forming nano-crystals, this only occurs at a high process temperature >450oC. We have developed successfully a dual plasma treatment on bottom surface to reduce the growth of interracial layer and then adopted high-k TiO2 (k~50-80) to mix medium-□ dielectric with large conduction band offset as a dielectric to improve the electrical and analog characteristic of MIM capacitors. These TiO2-based dielectrics (k ~40-50) such as TiHfO, TiLaO and TiZrO exhibit good performance and thermal stability. On the other hand, stress degradation is especially a concern in low-breakdown field and small-bandgap STO materials, which also leads to high leakage currents because of the small conduction band discontinuity with respect to Si. Here we describe the stress behavior on electrical and analog characteristics of hi-k MIM capacitors from low frequencies (100 kHz~1 MHz) to high frequencies (1 GHz~20 GHz). This method will be beneficial to the reliability evaluation of MIM capacitors for DRAM/RF application. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009114806 http://hdl.handle.net/11536/48390 |
顯示於類別: | 畢業論文 |