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dc.contributor.author李志鴻en_US
dc.contributor.authorLi, Chih-Hungen_US
dc.contributor.author陳宏明en_US
dc.contributor.authorChen, Hung-Mingen_US
dc.date.accessioned2015-11-26T01:06:26Z-
dc.date.available2015-11-26T01:06:26Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079887511en_US
dc.identifier.urihttp://hdl.handle.net/11536/48899-
dc.description.abstract此篇論文旨將階層式自動合成架構之設計應用於金屬氧化層場效應電晶體運算放大器(CMOS Op-Amp)中。此階層式設計由二階段組合而成-由下而上的探索和由上而下的優化處理。前段步驟主要是經由元件契合(device fitting)的過程求得元件及電路的參數對應關係,再經由效能探索(performance exploration)的過程將元件與電路效能做一個描述性的轉換,藉此找出參考電路的效能極限;後段步驟在於從已搜尋到的電路效能集合中選擇出最適者來導出構成元件的各項參數的最佳模擬解。然而,由於在先進製程裡的參數變異將會造成device fitting的不準確,此由上而下的優化步驟所得之局部區域的最佳結果會經retargeting來做修正。基於Op-Amp參考電路,此篇加強不同電路模型架構的應用,並另其極有效地找出每個範例電路模型的效能。zh_TW
dc.description.abstractIn this thesis, hierarchical design is employed to the automatic synthesis framework applied to the CMOS Op-Amp circuit. This hierarchical framework is consist of two stage, a bottom-up searching and top-down optimizing. In the bottom-up way, technology device information is transformed into circuit performance domain by device ?fitting and performance exploration. Then, the appropriate performance among the performance space we have searched is chosen to target the optimal simulation result via our top-down flow. However, the uncertainty of device fitting is damaging on advanced technologies' deviation. This top-down flow will also revise the local optima via retargeting. Based on this Op-Amp circuit, we further enhance this framework on different circuit model, and methods used to find out maximum efficiency of each circuit model will be more efficient.en_US
dc.language.isoen_USen_US
dc.subject類比電路最佳化zh_TW
dc.subject自動化電路效能探索zh_TW
dc.subject類比電路模擬zh_TW
dc.subject整合式電路設計zh_TW
dc.subject階層運算放大器設計zh_TW
dc.subject階層類比電路設計zh_TW
dc.subjectoptimizationen_US
dc.subjectperformance evaluationen_US
dc.subjectspace explorationen_US
dc.subjectanalogue circuitsen_US
dc.subjectcircuit simulationen_US
dc.subjectintegrated circuit designen_US
dc.subjectdifferential operational amplifieren_US
dc.subjecthierarchical global-to-local search processen_US
dc.subjectintegrated hierarchical op-amp circuit synthesisen_US
dc.subjectintegrated hierarchical analog circuit synthesisen_US
dc.subjectperformance mappingen_US
dc.subjectperformance metricsen_US
dc.subjectopamp circuit designen_US
dc.subjecttrade-off aspect identificationen_US
dc.title運算放大器電路之整合式階層模擬應用zh_TW
dc.titleAn Implementation of Integrated Hierarchical Synthesis in Op-Amp Circuitsen_US
dc.typeThesisen_US
dc.contributor.department平面顯示技術碩士學位學程zh_TW
顯示於類別:畢業論文


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