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dc.contributor.author廖盛斌en_US
dc.contributor.author劉柏村en_US
dc.date.accessioned2014-12-12T01:54:21Z-
dc.date.available2014-12-12T01:54:21Z-
dc.date.issued2011en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079887520en_US
dc.identifier.urihttp://hdl.handle.net/11536/48903-
dc.description.abstract本論文主要討論LTPS TFT 元件製造過程中,利用縮減製程的方式,達 到降低製造成本、縮減製程時間以及大幅提升製造產能之目標。論文中提 出新穎(一)與新穎(二)之LTPS TFT 元件製程結構流程,主要利用灰階光罩 (Gray Tone Mask)將傳統兩道曝光製程合併為一道以及省略曝光製程的技 術。應用以上技術,可以縮減1~2 道曝光製程,所以與傳統(Normal) 製程 之LTPS TFT 元件比較,可縮減製程流程、降低製造成本、縮減製程時間以 及提升製造產能。 在灰階光罩部份,應用灰階光罩的半曝光(Semi-Exposure)特性,形成兩 階(bi-layer)的光阻層次(Photoresist Remain),將傳統製程之多晶矽(Poly-Si) 曝光製程以及定義NMOS 汲極/源極或PMOS 汲極/源極曝光製程合併為一 道灰階光罩曝光製程。在省略曝光製程部份,將通道摻雜曝光製程省略, 可減少一道曝光製程,並利用調整通道摻雜劑量,使NMOS 與PMOS 臨界 電壓(Threshold Voltage)相互對稱,以利TFT 能與一般傳統製程之TFT 一樣 正常動作,並維持其應有的優良特性。 此外,在經由正閘極偏壓應力(Positive Gate Bias Stress,PGBS)、負閘 極偏壓應力(Negative Gate Bias Stress,NGBS)以及閘極與汲極偏壓應力 (Gate and Drain Bias Stress,GDBS)之可靠度測試後,新穎(一)及新穎 (二)LTPS TFT 元件與傳統LTPS TFT 元件之元件特性(performance)相近,並 ii 無明顯差異。 最後,在本論文實驗結果中,得知應用灰階光罩及省略曝光製程的技 術,可以大幅縮減Array TFT 製程,並可達到降低製造成本、縮減製程時間 以及提升製造產能;其中在元件特性(performance)上,也可得知使用灰階光 罩技術的TFT 製程與傳統TFT 製程之元件特性兩者相近,並無差異。zh_TW
dc.description.abstractThis paper is discussed how to reduce the LTPS TFT process in order to make cost down, reduce the process time and increase the production value. For this purpose, I propose the New(1) and New(2) LTPS TFT process flow, using gray tone mask to merge two PEP photo process into one and skip photo process technology . Application of these technologies can reduce 1 to 2 photo process, so it is better than normal LTPS TFT process. About the gray tone mask, we use the special property of gray tone mask. The bi-layer making photoresist remain could merge the photo process of Poly-Si and NMOS souse/drain define or PMOS NMOS souse/drain define into one. About the channel doping, we could skip the channel doping mask and skip one photo process. To adjust channel doping dosage to make the threshold voltage of NMOS and PMOS balance. Besides, under some reliability test like PGBS (Positive Gate Bias Stress), NGBS (Negative Gate Bias Stress) and GDBS (Gate and Drain Bias Stress), we can fine the LTPS TFT performance of New(1) and New(2) are similar to normal LTPS TFT process. At last, according to the experiment result, we know the technology of gray tone mask and skip photo process could reduce the array process substantially. And it also could reduce the production cost, process time and the production valve. In TFT performance, we find out that the TFT performance of gray tone mask as well as normal LTPS TFT process.en_US
dc.language.isozh_TWen_US
dc.subject低溫多晶矽zh_TW
dc.subject灰階光罩zh_TW
dc.subjectLTPS TFTen_US
dc.subjectGray tone masken_US
dc.title利用半曝光技術之低溫多晶矽薄膜電晶體製程研究zh_TW
dc.titleStudy of LTPS TFT Process by Using Semi-Exposure Mask Technologyen_US
dc.typeThesisen_US
dc.contributor.department平面顯示技術碩士學位學程zh_TW
Appears in Collections:Thesis