低溫多晶矽薄膜電晶體變動性之可靠度的研究

Abstract

本論文主要研究低溫多晶矽薄膜電晶體的非均勻性問題對元件可靠度的影響，首先選取在相同製程條件下所製造出來的元件，建立不同的偏壓條件與偏壓時間下的偏壓地圖。實驗的結果與之前的論文做比較，在偏壓地圖中展現出未曾發現到的不同元件劣化情況，我們將偏壓地圖分成幾個區域，另一方面考慮到元件變動的因素在某幾個偏壓條件下去觀察不同元件特性元件劣化情形，不同的元件特性造成的劣化現象與程度皆非常發散，顯示出元件壽命預測的困難度，最後我們在一個特殊的偏壓條件下具體展現出可靠度變動情況，此偏壓條件恰好落在熱載子效應與自發熱效應的邊界上，在此條件下，元件劣化情況對元件起始特性非常敏感。除了偏壓條件之外，亦須考慮元件的變動性以開發低溫多晶矽薄膜電晶體電路設計所需的可靠度模型。

The thesis studies the issues about the uniformity of low temperature poly-silicon (LTPS) thin film transistor (TFT) affecting on the device reliability. Firstly, we collect devices fabricated by the identical process and establish the stress map including different DC bias stress conditions of gate and drain voltages for the stress time up to 1000s. The results are compared with the previous papers and found to exhibit some different phenomena which had never been seen before in the stress map. The stress map can be divided into several regions and their corresponding degradation mechanisms are discussed. On the other hand, considering the device variation, several device with identical fabrication process but different characteristics are stressed at some bias conditions to observe their degradation behaviors. The appearance and degree of instability are very diverse, indicating the difficulty in the device lifetime prediction. Finally, we demonstrate the device reliability variation in a special stress condition, which is at the boundary of regions for the hat carrier effect and the self-heating effect. At this condition, the degradation phenomena are sensitive to the initial device characteristic. To develop the reliability model for the LTPS TFT circuit design, in addition to the effects of stress conditions, the variation for the devices must be considered concurrently.