完整後設資料紀錄
DC 欄位語言
dc.contributor.author傅子瑜en_US
dc.contributor.authorFu, Tz-Yuen_US
dc.contributor.author崔秉鉞en_US
dc.contributor.authorTsui, Bing-Yueen_US
dc.date.accessioned2014-12-12T01:55:01Z-
dc.date.available2014-12-12T01:55:01Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079911503en_US
dc.identifier.urihttp://hdl.handle.net/11536/49052-
dc.description.abstract隨著半導體製程微縮,半導體元件的接觸電阻也因為面積縮小而增大,而晶片迴路的總驅動電流也因此被降低。為了繼續微縮元件,如何有效降低接觸電阻變成是一個重要議題。而接觸電阻與蕭基位障、基板濃度等因素息息相關,因此可藉由調整此兩種參數去降低接觸電阻。許多研究指出經由特定製程可有效降低蕭基位障,例如:離子佈植、熱退火處理,並給出等效的蕭基位障值。然而這些蕭基位障都是藉由熱游離模型萃取而得,而只採用熱游離模型的傳導機制對於萃取蕭基位障並不足夠。經過特定製程之元件,其半導體表面電場可能已被大幅提升,電流傳導機制也可能不再是熱游離模型主導。因應高電場效應,場發射模型應被考慮在傳導機制中。藉由萃取正確的蕭基位障,經由特定製程所導致之實際影響才能被正確討論及應用。 本研究建立一完整考慮熱游離、場發射、鏡像電荷導致位障降低及寄生電阻等機制的蕭基位障擷取程序。經以技術電腦輔助設計軟體模擬,驗證此程序之正確性。不同位障高度、不同基板濃度以及非均勻摻雜之基板也在模擬作業中被完整討論。更進一步地研究各種材料之基板所形成的蕭基接面,以及不同離子佈植條件之影響,最後再探討本程序對於萃取極低蕭基位障之可行性。 在模擬作業中,模擬工具與實際之鏡像電荷導致位障降低機制之差異已被完整討論。由於模擬工具中的鏡像電荷導致位帳降低機制模型過度簡化,導致模擬結果不能完全符合實際之蕭基接面。在不同基板濃度之模擬中,討論了電流密度隨逆偏電壓之變化。由於高濃度基板造成更嚴重的鏡像電荷導致位帳降低之影響,對數軸中電流密度對電壓之斜率會隨著濃度提升。在非均勻摻雜之基板模擬中,討論了表面濃度提升之影響。表面濃度提升並不會降低蕭基位障,而只是造成更嚴重的鏡像電荷導致位障降低之影響。 在實驗中驗證了此萃取程序對於不同基板材料,例如:碳化矽、鍺、矽,之可行性。另外,碳離子佈植對矽化鎳/矽接觸面之蕭基位障高度的影響也在此被討論。從程序中萃取之蕭基位障及載子濃度得知,碳離子佈植對蕭基位障並無作用,僅僅只是提升等效載子濃度。再來藉由矽化鉑/矽接觸面之蕭基接面探討此程序對於極低蕭基位障萃取之可行性。蕭基位障隨溫度變化之現象在低溫測量被觀測到,而其可能是由於半導體表面能階改變導致費米能階鎖定位置不同。最後研究了氟化硼離子佈植對蕭基接面之影響。跟模擬結果作比較後,我們相信硼離子會加強鏡像電荷導致位障降低之效果,而氟離子會有修補表面能階之功能。 本研究提出了一項快速且準確的蕭基位障擷取程序。擷取過程僅需數十秒,且量測得到的數據不需要額外的人工處理。因此,特定製程對蕭基接面之影響可以被正確地探討及應用。zh_TW
dc.description.abstractAs the scaling of the semiconductor fabrication process, the contact resistance in semiconductor devices becomes larger due to the smaller contact area, and the total driving current is degraded. How to reduce the contact resistance is an urgent issue for the continued scaling. Contact resistance is highly dependent on the Schottky barrier height (SBH) and the substrate doping concentration, so they can be lowered by adjusting these two parameters. Several studies have been proposed that the SBH can be lowered by some specific fabrication processes, for example ion implantations and thermal annealing, and those literatures reported the effective SBHs. However, these SBHs are extracted by the thermionic emission (TE) model, and it is not adequate for extracting the actual SBH. For the devices after specific fabrication process, the electric field near the semiconductor surface may be intensively increased, and the conducting mechanism may be no longer dominated by the TE model. For the high electrical field, the field emission (FE) model should be considered into the conducting mechanism. Without extracting the actual SBH, the effect of the specific fabrication process cannot be correctly discussed and applied. In this thesis, we setup a procedure to extract the SBH considering thermionic emission, field emission, image-force barrier lowering (IFBL) model and parasitic resistance thoroughly. The validity of the proposed procedure is verified and confirmed by technology CAD tool. Different SBHs and different substrate doping profiles have been discussed in the simulation work. Furthermore, the Schottky junctions on different semiconductor materials and the effects of ion implantations are studied, and the validity of extracting the exact low SBHs is discussed at last. In the simulation work, the difference of the IFBL models between the real case and the simulating tool is explored. The IFBL model in the simulation tool is too simple to fit the real Schottky junction. In the simulation of different substrate doping concentrations, the current-voltage characteristics at reverse bias are discussed. The slope in the log(J)-V raises as the concentration increases due to the severe IFBL effect. In the simulation of non-uniformly doped profiles, it is observed that the increasing of the surface doping concentration does not lower the actual SBH but induce severe IFBL effect. In the experiment, the validity of extracting the SBHs on various semiconductor materials including silicon carbide, germanium, and silicon, by the proposed procedure is verified. Furthermore, the effect of carbon ion implantation on the SBH of NiSi/Si contact is discussed. The extracted SBH and doping concentration show that the carbon ion implantation does not change the SBH but simply increases the effective carrier concentration. The validity of the exact low barrier height extraction is verified through the case of PtSi/Si Schottky junction. The temperature dependence of the SBH is observed at low temperature, and it is believed that the make-up of the surface states is changed and results in Fermi-level pinning at different energy levels. Finally, the effect of BF2+ ion implantation on the Schottky junction is discussed. In comparison with the simulation results, it is believed that the increasing boron ions enhance the IFBL effect and the fluorine ions have the ability to repair the surface states. This thesis proposes an efficiency and accurate procedure for the SBH extraction. It only takes about tens of seconds, and it is not necessary to cope with the measured data artificially. The effect of the specific fabrication process on the Schottky junctions can be correctly discussed and applied.en_US
dc.language.isoen_USen_US
dc.subject蕭基位障zh_TW
dc.subject萃取zh_TW
dc.subject模擬zh_TW
dc.subject比對zh_TW
dc.subject鉑化矽zh_TW
dc.subjectSchottky Barrieren_US
dc.subjectExtractionen_US
dc.subjectSimulationen_US
dc.subjectFittingen_US
dc.subjectPtSien_US
dc.title精確且高效率之蕭基位障萃取程序zh_TW
dc.titleAn Accurate and Efficient Procedure for Schottky Barrier Height Extractionen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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