有機鐵電薄膜於閘極堆疊結構之研究

Abstract

鐵電材料已廣泛運用於生活中，應用上以鐵電記憶體 (FeRAM)所佔比例最多，因為其被視為新興非揮發性記憶體之一，其中的鐵電閘極場效式電晶體(FeFET)因可高密度整合而頗受矚目。最近有一新的鐵電閘極場效電晶體應用被提出用以降低次臨界擺幅，以便降低供應電壓及功率消散。 為了製作鐵電閘極場效電晶體，鐵電材料需堆疊至矽基板並高溫退火，造成交互擴散及不良介面，因而降低鐵電特性。插入緩衝層是一解決方法，但電晶體就無法低電壓操作。有機鐵電材料有較低的介電常數、低溫製程、易於大面積製作、可用於可撓式電子產品等優點，因而很多研究及應用已報告出來。 在這篇碩士論文中，將製作不同的閘極堆疊電容，包括聚乙烯醇(PVA)或聚偏氟乙烯-三氟乙烯[P(VDF-TrFE)]並分析其表面形貌、電流電壓、電容電壓與溫度變化等特性。帶低溫蕭特基接觸與二氧化矽/聚乙烯醇/二氧化矽或二氧化矽/聚偏氟乙烯-三氟乙烯/二氧化矽的閘極堆疊結構矽基電晶體也將製作並分析。

Ferroelectric materials have been widely used in modern life. Among all applications, ferroelectric random access memory (FeRAM) has a large portion of ferroelectric materials due to a candidate of emerging nonvolatile memory, in which ferroelectric-gate field effect transistor (FeFET) was attracted much attention because of high density integration. Recently a new approach of FeFET has been proposed to lower subthreshold swing, which can reduce supply voltage and power dissipation. In order to fabricate FeFET, ferroelectric materials stacked on Si substrate need high temperature anneal, causing interdiffsion and poor interface, so that decreases ferroelectric charateristics. Inserting a buffer layer is a solution but FeFET cannot operate at low voltage. Organic ferroelectric is with advantage of lower dielectric constant, low-temperature process, easy fabrication of large area, and feasibility of flexible electronics, for which many studies and applications have been reported. In this thesis different gate stack capacitors with polyvinyl alcohol (PVA) or poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] are fabricated and analysis characteristics by morphology, J-V and C-V characteristics with changing temperature. Si-based transistors with low-temperature formed Schottky contact and SiO2/PVA/SiO2 or SiO2/P(VDF-TrFE)/SiO2 gate stack are fabricated and analyzed.