高介電係數金屬閘極層穿隧電流機制探討

Abstract

本論文利用雙層介電質模型成功模擬次奈米介電層厚度TiN/HfO2/IL/Si場效 電晶體元件之閘極穿隧電流，使得在相同的雙層介電質模型下，高介電係數金屬 閘極穿隧電流機制可以從奈米級繼續往下探討到次奈米級。並以此與實驗室之前 奈米級介電層厚度的TaC/HfSiON/IL/Si 場效電晶體元件穿隧電流分析相互比較 ，得出穿隧等效質量mk=0.03m0 存在於HfSiON以及HfO2，這顯示mk=0.03m0 是由於Hf所造成。並且發現隨著中間介電層厚度(IL)的微縮，其穿隧等效質量 mIL必須隨著變大，模擬的閘極穿隧電流才能跟實驗值符合。我們因此啟發並經 模擬證實後，提出針對以鉿(Hf)氧化物/矽化物/氮化物為高介電係數層材料的正 確說法:“主要穿隧距離為中間介電層(IL)厚度，而高介電係數層的存在可以在分 擔中間介電層的壓降而降低閘極穿隧電流下，維持相同等效氧化層厚度” 以修正 傳統說法:“高介電係數金屬閘可以在增加總穿隧距離而因此減小穿隧電流下，維 持相同等效氧化層厚度”。

Through gate tunneling current simulation and data fitting on TiN/HfO2/IL/Si MOSFETs in this work, gate tunneling mechanisms could be explored for IL thicknesses scale continuously from nanoscale to subnanoscale in the content of the dual-dielectric-layer model. Then, by comparing it with nanoscale IL TaC/HfSiON/IL/Si MOSFETs in our previous work, we found that the tunneling effective mass mk=0.03m0 exists not only in HfSiON but also in HfO2. This indicates that mk=0.03m0 results from Hf itself. Furthermore, we found that as IL thickness reduces, tunneling effective mass mIL must increase to fit gate tunneling current data well. We are therefore inspired and verify it with simulation, proposing a correct statement with respect to the Hf silicide/oxide/nitride dielectric materials that “ IL thickness is the main tunneling distance, with the HK layer serving as the role of potential drop divider which decreases the potential drop of IL, leading to much smaller gate tunneling current while maintaining the same effective oxide thickness (EOT) ” rather than “ the HK layer can extend the total tunneling distance which decreases the gate tunneling current while maintaining the same EOT. ”