二氧化鉿電阻式記憶體多位元操作之隨機電報雜訊分析

Abstract

電阻式記憶體近年來成為非揮發性記憶體的熱門探討主題，歸因於其擁有面積小、高密度、低成本以及低耗能等優勢。在眾多材料當中，以二氧化鉿為基底的電阻式記憶體和現今的高介電係數電晶體製程技術最為相容，也較成熟。電阻式記憶體儲存狀態的方法是透過不同電壓條件改變阻態，不少文獻指出此變化歸因於二氧化鉿絕緣層於不同偏壓下所產生的軟性崩潰(soft breakdown)所致。

然而為了提高儲存密度，一方面在單一元件中必須設法達到多位元的存取，另一方面必須確保各狀態判讀不能有誤，精準控制每個狀態是必要的。隨著元件面積持續縮小，在氧化層中單一缺陷對電流反映出的影響所占比重增加，因此隨機電報雜訊(random telegraph noise)所帶來的問題不容小覷，它將嚴重的影響我們元件中各狀態判讀的正確與否。隨機電報雜訊分析可被用來詳細探討高介電係數電晶體之載子行為。

在本論文中，吾人採用了掃描(sweep)與脈衝(pulse)兩種電壓操作方式在單一元件中來達成多位元的存取並分別探討其可靠度問題，包含寫入狀態的資料保存、多次重覆寫入/抹除的元件耐久性、面積對重覆寫入/抹除的阻值不穩定關係等。我們運用隨機電報雜訊分析，來分析路徑產生對記憶體的判讀產生的影響。藉由分析捕捉時間(capture time)與發射時間(emission time)，吾人可以計算出缺陷位置、能量的深度；並運用隨機電報雜訊電流擾動的振幅，對應比較不同的操作方法，幫助吾人分析不同增壓速率下其軟性崩潰路徑的分佈。實驗結果顯示，電壓增加速率的快慢關係著元件氧化層中軟性崩潰路徑的分散與集中；軟性崩潰路徑越分散，則元件轉態後阻值將越不穩定，影響判讀準位。

Resistance-change Random Access Memory (RRAM) has recently received much more attention owing to its potential layout toward high-density, low-cost, and low-energy non-volatile memory. More recently, the dielectric HfO2 has become the mainstream of modern transistor and capacitor microelectronics, and is now a strong candidate for RRAM applications. The switching mechanism of HfOx RRAM has been considered as the formation and rupture under applied bias of the soft-breakdown paths. To achieve large bit storage in a scaled device with a high density memory cell array, multi-level operation is required. To achieve this requirement and maintain a large resistance memory window, both the low resistance state and high resistance state must be significantly controlled. One of the important phenomena, the current fluctuation caused by the Random Telegraph Noise (RTN) has created a huge impact on the read-out of the RRAM, in particular for multi-level applications. RTN analysis is extensively used to study electron transport in high-□ gate dielectric MOSFETs

In this work, we have studied the effect of sweep and pulse operations for the RRAM device to achieve multi-level storage. The multilevel storage characteristics of our study showing that different resistance states of the RRAM device can be achieved by different operation voltages or currents. We discussed the reliability issues including data retention time, program/erase cycling endurance, and the cell size dependence of the resistance fluctuation.

The RTN signals have been utilized to examine the effects of soft breakdown paths status in RRAM devices. By observing the bias and temperature dependence of capture and emission time, the defect location could be identified. Through both post-sweep and post-pulse RTN current measurements, we found a different trend of the RTN current amplitude between these two operation methods. Results show that the voltage ramping rate during the forming and set process (transition from the high resistance to the low resistance state) is a key parameter to determine the distribution of soft breakdown paths. The dispersed one will cause the instability of switched resistance, and induce the erratic bit during the read-out of RRAM.