具有線電壓重建及總諧波失真最佳化以達到0.99功率因數及1.7%總諧波失真之功率因數校正控制器

Abstract

隨著人口的增加以及各國的工業化，世界對於能源的需求也逐漸增加，近幾年來，能源短缺的問題變得越來越嚴重，因此，綠能的議題漸漸地被受到重視。功率因數校正可以調整隔離式電源供應器產生的電流與輸入交流電壓形成同相位，使得可利用的實功最大化，達到高功率因數的效果。輸入電流的總諧波失真是一個影響功率因數的重要因子。對於類似像變壓器及照明設備這些低瓦數的應用，考量到為了維持高功率因數和高效率，臨界導通模式是一個較適合的控制方式。然而，傳統的臨界導通模式之功率因數升壓轉換器有著兩個主要的失真問題，一種是因為橋式整流器的導通電壓以及寄生電容而造成的交越失真，另一種是線電壓頻率反射失真。由於失真造成的諧波電流會對其它電子設備產生嚴重的影響，因此在國際上有許多限制諧波電流的規範，為了符合日趨嚴格的諧波規範，在本篇論文中，提出了一個有效改善總諧波失真的技術。 在一個寬範圍的輸入線電壓中，本論文所提出的線電壓重建技術與總諧波失真最佳化技術可以有效地增進功率因數與改善總諧波失真。線電壓重建技術可偵測輸入線電壓的方均根值並且產生等效的數位碼給總諧波失真最佳化技術利用，總諧波失真最佳化技術依據收到的數位碼合適地去調整導通時間，即使對於不同的線電壓輸入，都可達到總諧波失真最佳化的效果。另外藉著線電壓重建技術與總諧波失真最佳化技術提供了一條前饋路徑使得回受電壓漣波減小，更進一步地去改善總諧波失真。因此，本論文所提出的功率因數校正控制器，即使在一個寬範圍的輸入線電壓中，仍然可以維持高功率因數及低總諧波失真的表現。實驗結果顯示，藉由本論文提出的技術，功率因數可高於0.99，並且在輸入交流電壓為90伏特及110伏特時，總諧波失真為1.7%，其測試電路利用台灣積體電路公司八百伏特超高壓製程實現。

As populations increase and countries industrialize, the world’s demand for energy increases. In recent years, the energy-shortage problem becomes more serious. Therefore, the issue of green power is respected gradually. Power factor correction (PFC) can shape the input current of off-line power supplies to be in-phase with the input AC voltage in order to maximize the available real power from the AC source to achieve high power factor (PF). The total harmonic distortion (THD) of input current is an important factor for PF. Considering high power factor (PF) and efficiency, the boundary conduction mode (BCM) control is more suitable for low-power applications such as the adapter and lighting. However, there are two major THD-deteriorated contributors in a conventional PFC boost converter with BCM control. One is the crossover distortion caused by the diode’s forward voltage in the bridge and parasitic capacitances. The other is the line frequency reflected distortion. Because the harmonic current can interfere with other electronic equipment seriously, there are many international standards to limit harmocin current. In order to conform the harmonic-current standards stricter and stricter, an improving THD technique is proposed in this thesis. The proposed line voltage recovery (LVR) and the total harmonic distortion optimizer (THDO) improve PF and THD over a wide line voltage range. The LVR detects the input line root-mean-square (rms) voltage to generate the digital equivalent code to the THDO for optimizing the THD by tuning the on-time value at different line voltages. Besides, the LVR and the THDO provide a feedforward path to reduce the ripple of the feedback voltage for further improving the THD. Therefore, the PFC controller can keep high PF and low THD over a wide line voltage. Experimental results demonstrate the PF is higher than 0.99 and the THD is 1.7% at VAC of 90 - 110V by the test circuit fabricated in TSMC 800V UHV process.