標題: 鎳金屬誘發側向結晶垂直通道低溫複晶矽薄膜電晶體之研究
The Study of Vertical Channel LTPS TFTs with Metal-Induced Lateral Crystallization Method
作者: 郭柔含
Kuo, Rou-Han
趙天生
Chao, Tien-Sheng
電子物理系所
關鍵字: 低溫多晶矽;薄膜電晶體;垂直通道;Low temperature polycrystalline silicon;Thin-film transistor;Vertical channel
公開日期: 2011
摘要: 多晶矽薄膜電晶體擁有較高的載子遷移率,被認為可廣泛應用於主動矩陣式液晶顯示器的主動開關元件上。為了提升元件特性,元件的通道長度的微縮是有必要的。然而,垂直通道結構的複晶矽薄膜電晶體的通道長度是以沉積的閘極厚度所決定,並不受微影機台的限制,因此具有高度的發展潛力可應用於三維垂直整合。但過多的晶粒界面及缺陷存在於通道中將大幅地劣化多晶矽薄膜電晶體的特性。 在本論文中,我們利用了金屬誘發側向結晶的方式製作垂直通道的多晶矽薄膜電晶體,其製程簡單,並不需要額外的光罩並與CMOS製程有高度相容性,且其具有等效的雙閘極結構,能有效地抑制汲極端的電場以降低漏電流並提升開關電流比。 本研究提出利用氨電漿處理及結晶過濾效應可有效地提升元件特性。研究中發現,較窄的結晶通道寬度具有較佳的結晶特性及較少的晶界缺陷,因此我們可利用較窄的結晶過濾寬度來有效地提升元件特性。此外,我們也比較了以鎳金屬誘發側向結晶及鎳金屬矽化物誘發側向結晶的差別。由結果顯示,兩種方式並沒有太大的差異。推論由鎳金屬矽化物誘發側向結晶的方式無法有效地進一步降低在通道中的鎳金屬含量。但藉由結晶過濾效應,兩種結晶方式都可利用通道個數的增加來提升元件的開關電路比,且並不影響其他電性表現。
Polycrystalline silicon thin-film transistors (poly-Si TFTs) have attracted considerable attention because of its application in active matrix liquid crystal displays (AMLCDs), due to their higher mobility than amorphous silicon (a-Si) TFTs. There is a need to scale down poly-Si TFTs’ channel length to achieve higher speeds and packing densities. Therefore, vertical-channel thin-film transistors (VTFTs) have been widely researched and developed to overcome the limits of photolithography. VTFTs have shown great potential for 3-D integration since the channel lengths are determined by the thicknesses of the poly-Si or SiO2 film, instead of photolithographic process limitations. In this thesis, we have fabricated the VTFTs with MILC technology. They are simple in structure and fabrication of VTFTs without any additional mask and compatible with the silicon technology. Moreover, VTFT structure which has the inherently own an effective dual-gate structure. And it can reduce the peak lateral electrical field in the drain depletion region, significantly reducing the leakage current and increasing the Ion /Ioff current ratio. We have proposed that the NH3 plasma treatment and crystal filtering effect can improve the electrical performance of VTFTs. In our research indicates that the narrower channel width has the better the electrical performance and less intra-grain defects and grain boundary. Thus, the high performance VTFTs can be achieved by reducing the channel width. Compare MILC-VTFTs with NSILC-VTFTs, we can observe that the electrical performance of them seems to be no significantly difference. The method of NSILC is not able to reduce the Ni and NiSi2 efficient and further improve the device characteristics. Both the MILC-VTFTs and NSILC-VTFTs can be improved the crystal filtering effect and multiple channel structure.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079921510
http://hdl.handle.net/11536/49707
顯示於類別:畢業論文


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