多功能低成本EEG訊號處理器設計與實現

Abstract

本論文提出了一個多功能和成本效益的腦電圖信號處理器，支持重新參考(rereference)，同步平均(Synchronized Average)，移動平均線(Moving Average)，並快速獨立分量分析（FastICA）。利用Gram - Schmidt過程提出了相應的硬件，可能會在兩個主要算法FastICA預處理和循環再用。在大量的渠道的狀況下，Gram - Schmidt的預處理算法的計算複雜度小於原CORDIC為基礎的預處理算法，為了要符合成本效益，粗分段近似雙曲正切函數和合適的記憶體大小也都是重要的議題。多功能和成本效益的腦電圖信號處理器在台積電的90納米 CMOS製程技術實現，在100兆赫1.43平方毫米大小的電壓為 1.0，功耗為22.0毫瓦。從實驗結果來看，處理器每個功能達到足夠的相關係數。

This thesis presents a multi-function and cost-effective EEG signal processor, which supports rereference, synchronized average, moving average, and fast independent component analysis (FastICA). A Gram-Schmidt process for FastICA preprocessing is proposed such that the corresponding hardware may be reused in two main algorithms of FastICA preprocessing and iteration. From computational analysis, the Gram-Schmidt based preprocessing algorithm has less computation complexity than the original CORDIC-based preprocessing algorithm, especially in large number of channels. Coarse piecewise linear approximation of hyperbolic tangent function and choosing satisfactory memory size are presented to be cost-effective. The multi-function and cost-effective EEG signal processor implemented in the TSMC 90nm CMOS technology process consumes 22.0 mW at 100 MHz at 1.0 voltage with a size of 1.43 mm2 when moving average is operating. From the experimental results, the processor achieves satisfactory correlation coefficient for each function.