標題: | Large Improvement in Image Rejection of Double-Quadrature Dual-Conversion Low-IF Architectures |
作者: | Syu, Jin-Siang Meng, Chin-Chun Teng, Ya-Hui Liao, Hua-Yu 電機工程學系 Department of Electrical and Computer Engineering |
關鍵字: | Dual conversion;Hartley architecture;image rejection;low IF;polyphase filter (PPF);Weaver architecture |
公開日期: | 1-七月-2010 |
摘要: | The reasons for a degradation of image-rejection performance in double-quadrature-double-quadrature and single-quadrature-double-quadrature dual-conversion low-IF downconverters are fully discussed in this paper. Polyphase filters (PPFs) are inserted at proper positions to minimize the effects of device/signal mismatches, and thus improve the image rejection without calibration. Both a 0.35-mu m SiGe heterojunction bipolar transistor 5.2-GHz double-quadrature-double-quadrature downconverter with an RF PPF and a 0.18-mu m CMOS 2.2/4.8-GHz single-quadrature-double-quadrature downconverter with a switched-band low-noise amplifier (LNA) and a narrowband inter-stage PPF are demonstrated. Compared with our previous work, the 5.2-GHz downconverter achieves a 15-dB improvement in image-rejection ratio (IRR) of the first image signal (IRRR(1)) even without a pre-selection filter or LNA. Additionally, the dual-band downconverter has a 25-dB improvement in IRR of the second image signal (IRRR(2)), which nearly reaches the theoretical limit of a four-stage PPF covering 20-40 MHz. |
URI: | http://dx.doi.org/10.1109/TMTT.2010.2049695 http://hdl.handle.net/11536/5163 |
ISSN: | 0018-9480 |
DOI: | 10.1109/TMTT.2010.2049695 |
期刊: | IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES |
Volume: | 58 |
Issue: | 7 |
起始頁: | 1703 |
結束頁: | 1712 |
顯示於類別: | 期刊論文 |