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dc.contributor.authorLee, Chen-Mingen_US
dc.contributor.authorTsui, Bing-Yueen_US
dc.date.accessioned2014-12-08T15:06:39Z-
dc.date.available2014-12-08T15:06:39Z-
dc.date.issued2010-07-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2010.2049564en_US
dc.identifier.urihttp://hdl.handle.net/11536/5200-
dc.description.abstractA novel 30-nm gate-all-around (GAA) polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistor (TFT) is reported for the first time. Owing to the NW and GAA structure, the channel electric potential is well controlled by the gate electrode. After NH(3) plasma treatment for defects passivation, the values of 0.97 V, 224 mV/dec., and 0.895 V/V of threshold voltage, subthreshold swing, and drain-induced barrier lowering are achieved, respectively. A high driving current of 459 mu A/mu m and an ON-state/OFF-state current ratio of 5 x 10(7) are also obtained. These excellent characteristics indicate that the ultrasmall GAA NW poly-Si TFT would have the potential to be applied in the 3-D integrated-circuit or system-on-panel field.en_US
dc.language.isoen_USen_US
dc.titleA High-Performance 30-nm Gate-All-Around Poly-Si Nanowire Thin-Film Transistor With NH(3) Plasma Treatmenten_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2010.2049564en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume31en_US
dc.citation.issue7en_US
dc.citation.spage683en_US
dc.citation.epage685en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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