完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Hui-I | en_US |
dc.contributor.author | Hu, Robert | en_US |
dc.contributor.author | Jou, Christina F. | en_US |
dc.date.accessioned | 2014-12-08T15:06:40Z | - |
dc.date.available | 2014-12-08T15:06:40Z | - |
dc.date.issued | 2010-07-01 | en_US |
dc.identifier.issn | 1531-1309 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LMWC.2010.2049440 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/5218 | - |
dc.description.abstract | This letter proposes a novel LNA design method where the complementary transistor topology is combined with asymmetrical inductive source degeneration to achieve matched input impedance over a wide bandwidth. A 2-10 GHz LNA is designed and fabricated using a commercial 0.18 mu m RF-CMOS process to verify the feasibility of our proposed method. In the intended bandwidth, this LNA has matched input impedance, 20 dB power gain, and 2.4-3.4 dB noise figure, with 25.65 mW power consumption. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Complementary | en_US |
dc.subject | input matching | en_US |
dc.subject | low noise amplifier (LNA) | en_US |
dc.subject | source degeneration | en_US |
dc.subject | wideband | en_US |
dc.title | Complementary UWB LNA Design Using Asymmetrical Inductive Source Degeneration | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LMWC.2010.2049440 | en_US |
dc.identifier.journal | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | en_US |
dc.citation.volume | 20 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 402 | en_US |
dc.citation.epage | 404 | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
dc.contributor.department | Institute of Communications Engineering | en_US |
dc.identifier.wosnumber | WOS:000281976000015 | - |
dc.citation.woscount | 3 | - |
顯示於類別: | 期刊論文 |