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dc.contributor.authorChen, K. N.en_US
dc.contributor.authorZhu, Y.en_US
dc.contributor.authorWu, W. W.en_US
dc.contributor.authorReif, R.en_US
dc.date.accessioned2014-12-08T15:06:41Z-
dc.date.available2014-12-08T15:06:41Z-
dc.date.issued2010-12-01en_US
dc.identifier.issn0361-5235en_US
dc.identifier.urihttp://dx.doi.org/10.1007/s11664-010-1341-yen_US
dc.identifier.urihttp://hdl.handle.net/11536/5234-
dc.description.abstractThis paper investigates and reviews the effects of wafer bow in three- dimensional (3D) integration bonding schemes, including copper wafer bonding and oxide fusion wafer bonding with silicon on insulator (SOI)-based layer transfer technology. Wafer bow criteria for good bonding quality and fabrication techniques to minimize wafer bow are introduced for 3D integration technology and applications.en_US
dc.language.isoen_USen_US
dc.subjectWafer bowen_US
dc.subjectwafer bondingen_US
dc.subject3D integrationen_US
dc.titleInvestigation and Effects of Wafer Bow in 3D Integration Bonding Schemesen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1007/s11664-010-1341-yen_US
dc.identifier.journalJOURNAL OF ELECTRONIC MATERIALSen_US
dc.citation.volume39en_US
dc.citation.issue12en_US
dc.citation.spage2605en_US
dc.citation.epage2610en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000283509000015-
Appears in Collections:Conferences Paper


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