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dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLiu, Ta-Weien_US
dc.contributor.authorHsu, Hsing-Huien_US
dc.contributor.authorLin, Chuan-Dingen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2014-12-08T15:07:01Z-
dc.date.available2014-12-08T15:07:01Z-
dc.date.issued2010-05-01en_US
dc.identifier.issn1536-125Xen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TNANO.2009.2029573en_US
dc.identifier.urihttp://hdl.handle.net/11536/5488-
dc.description.abstractA new method is proposed and demonstrated to fabricate planar thin-film transistors and trigated nanowire (NW) devices simultaneously on the same panel. By using an oxide-nitride oxide stack as the gate dielectric, the NW devices could also serve as nonvolatile Si-oxide-nitride-oxide-Si (SONOS) memory devices. Our results indicate that the combination of trigate and NW channels help to improve the device performance in terms of steppers subthreshold swing and reduced threshold voltage. Improvement in programming and erasing efficiency of the nonvolatile SONOS memory devices is also demonstrated with the trigated NW structure.en_US
dc.language.isoen_USen_US
dc.subjectField-effect transistoren_US
dc.subjectmultiple gateen_US
dc.subjectnanowire (NW)en_US
dc.subjectpoly-Sien_US
dc.subjectSi-oxide-nitride-oxide-Si (SONOS)en_US
dc.titleTrigated Poly-Si Nanowire SONOS Devices for Flat-Panel Applicationsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TNANO.2009.2029573en_US
dc.identifier.journalIEEE TRANSACTIONS ON NANOTECHNOLOGYen_US
dc.citation.volume9en_US
dc.citation.issue3en_US
dc.citation.spage386en_US
dc.citation.epage391en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000277775700019-
dc.citation.woscount5-
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