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dc.contributor.author張坤仁en_US
dc.contributor.authorKun-Zen Changen_US
dc.contributor.author吳慶源en_US
dc.contributor.authorChing-Yuan Wuen_US
dc.date.accessioned2014-12-12T02:10:36Z-
dc.date.available2014-12-12T02:10:36Z-
dc.date.issued1992en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT810430001en_US
dc.identifier.urihttp://hdl.handle.net/11536/56856-
dc.description.abstract一個新的複晶矽高低濃度射極雙載子電晶體結構在本論文中完成設計、製 造及分析。此種雙載子電晶體比傳統的雙載子電晶體具有較高的電流增益 、較低電流增益活化能、較高的射極-基極接面耐壓, 及較佳的熱載子可 靠性。在某一個驅入擴散的製造條件下, 我們獲了一個具有極高電流增益 及零活化能的珍奇特性, 這個珍奇的特性可用二維的基極電流流徑來解釋 。在熱載子衝擊期間的基極電流衰退行為, 可用本論文中所提出的衰退模 式來解釋。本論文中所提出之衰退模式是包含了比率方程式、回復過程、 復合過程、電子捕獲及電洞捕獲, 等物理現象。具有自動對準及非自動對 準射極結構的複晶矽高低濃度射極雙載子電晶體被用來做定電壓及定電流 的熱載子衝擊試驗。由於有高低濃度射極結構存在於這個電晶體中, 因此 降低了射極與基極間的尖端電場, 此現象使反定向電壓下的熱載子衝擊被 抑制下來。從實驗結果顯示具有高低濃度射極的電晶體比傳統的雙載子電 晶具有較的熱載子衝擊能力, 而且從定電流熱載子試驗結果, 發現非自動 對準射極結構的電晶體較自動對準結構的電晶體可承受較高的衝擊電流。 基極層的離子植入能量的變化會影響熱載子試驗的結果亦於實驗中觀察出 來。這些結果可用尖端電場的座落位置及衝擊電流的流徑來解釋.熱載子 衝擊後所增加的基極電流是屬於再生一複合電流也從它的溫度變化測量結 果得到證實. The polysilicon high-low-emitter (PHL-emitter) bipolar transistors have been designed, fabricated, and characterized. It is shown that the fabricated PHL-emitter bipolar transistors exhibit higher maximum current gain with lower activation energy, higher emitter-base breakdown voltage, and better hot- carrier reliability than those of the fabricated conventional bipolar transistors. A novel characteristics with a high current gain and zero activation energy at a certain collector current can be obtained under a given drive-in diffusion process. This novel characteristics are explained using the two- dimensional flow of the base current. The degradation behavior of base current during the hot-carrier stress are discussed using the proposed degradation model in this work. This complete degradation model considers the rate equations, the healing process, the recombination process, the electron-trap, and the hole-trap generation. The hot-carrier effects of constant voltage and constant current in the PHL-emitter bipolar transistors with the self-aligned and the non-self- aligned emitter structures are studied. Due to the presence of the high-low junction in the emitter, the peak electric field between emitter and base becomes lower and hot-carrier effects are suppressed during a constant-voltage stress. From the experimental results, we can find that the PHL-emitter devices exhibited higher hot-carrier reliability. Moreover, the endurance of stress current for a non-self-aligned emitter structure is larger than that for a self-aligned emitter structure. The implant energy of base layer affects the results of stress experiments has been observed. These results are explained by the location of peak electric field and flowing path of stress current under an applied reverse stress condition. The stress-induced base current resulting from the SHR generation -recombination current has been identified from its activation energy measurement.zh_TW
dc.language.isoen_USen_US
dc.subject複晶矽;高低濃度射極;雙載子電晶體;活化能;熱載子衝擊zh_TW
dc.subjectPolysilicon;High-Low Emitter;Bipolar;Transistor; Activation Energyen_US
dc.title一個新的複晶矽高低濃度射極雙載子電晶體結構製程技術及分析zh_TW
dc.titleA novel polysilicon high-low emitter bipolar transistor structure-fabrication technology and characterizationen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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