標題: 互補金氧半超取樣類比數位轉換器的設計分析與測試
The Design, Analysis and Testing of the CMOS Oversampling Digital-to-Analog Converter
作者: 魏維信
Wei-Shinn Wey
吳重雨;俞再鈞
Chung-Yu Wu; Chung-Tasi Yu
電子研究所
關鍵字: 互補金氧半導體;超取樣;類比數位轉換器;取樣類比數位轉換器;CMOS;Oversampling;Digital-to-Analog Converter;Oversampling DAC;DAC
公開日期: 1992
摘要: 本論文探討了互補金氧半導體超取樣類比數位轉換器的設計與測試。為了 符合音響應用的需求,一個訊號雜訊比到達95分貝的四階一位元和差調 變器已經被設計出來。這種新的和差調變器去除所有的即時回授迴路,因 而放鬆了對加法器與乘法器在速度上的需求。另外,對於重建濾波器,我 們做了兩種實驗性的嘗試;一種是傳統的開關電容濾波器其中使用了切換 穩定運算放大器,另一種是電流式半數位有限脈波響應濾波器。我們也成 功地發展了專為超取樣轉換器而設計的測試系統的數位測試器,這個測試 器含有兩區塊的256千字元的記憶容量,而且其資料傳輸率可以達到2 0百萬赫茲。這樣的功能完全符合測試超取樣轉換器的需求。 The thesis deals with the design with the design and testing of the CMOS over-sampling Digital-to-Analog converter. For the audio applications, a new fourth-order sigma-delta modulator with simulated result of 95 dB SNR is proposed. The new high- order one-bit modulator removing the real-time feedback loops relaxes the speed requirement of the adders and the multipliers. Two experimental approaches of the reconstruction filter is described. One approach is the con- ventional switched-capacitor filter with chopper stabilized op-amps, the other is the current-mode semi-digital FIR filter. A digital tester especially for the testing of the oversampling converters has been developed successfully. The tester contains two blocks of 256K words memory and can achieve the 20 MHz clock rate, which meets the requirement of the testing of the oversampling converters.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT810430030
http://hdl.handle.net/11536/56888
Appears in Collections:Thesis