非晶矽薄膜電晶體之研製

Abstract

由本研究群自行設計之電漿輔助化學氣相沉積系統, 成功地以攝氏溫 度250℃∼350℃之沉積溫度製成高性能非晶矽薄膜電晶體,我們藉由分解 矽烷與氨氣混合物沉積氮化矽膜, 由於沉積過程中配以氫氣處理故所得薄 膜為高品質氮化矽。於所沉積之氫化非晶矽薄膜厚度(4500埃)足以抵擋來 自外界之破壞, 因此我們所製成之元件可免去另外沉積一層鈍化膜, 如此 可簡化整個製程。元件退火處理將可得到不同之效果, 我們發現以180 ℃ 為最佳之退火溫度而在退火過程中加10﹪氫氣於氮氣裡來降低 fast state 之密度, 而事實上經過退火處理之後, 元件之臨限電壓大小值即明 顯地下降, 証明 fast state 為主宰元件不穩定之機構。由實驗得知, 我們所製之反疊差型薄膜電晶體有較低之臨限電壓(2.73∼4.68volt), 次 臨限擺幅(0.481∼ 0.836 V/decade)及較高之開關電流比(1E07∼1E08) , 場效遷移率(0.644∼1.27 ｃ㎡/V.sec), Ion/W 比(5.70E-2 ∼ 9.75E-2 A/m), 這些數據都足以因應液晶顯示器應用之需求。 Thin film transistor with high performance at low dep- osition temperature in the range of 250 - 350 oC were suc- cessfully fabricated. Our silicon nitride film was deposi- ted by decomposing silane and ammonia mixture . Due to the introduction of hydrogen gas, the silicon nitride film is of high quality with dielectric constant 4.6 - 5.09, refr- active index 1.73 - 1.88. The thickness of a-Si:H is thick enough to avoid the external damage, thus our devices are free from making passivation layer to simplify the fabric- ation process. Annealing the devices in different tempera- tures will show different results. According to our inves- tigation, 180 oC is the optimal annealing temperature to enhance the performance of present devices. During the an- nealing process, we used 10 % hydrogen in 90 % nitrogen as the forming gas was used.It introduces H atoms to the a-Si : H / SiN interface and reduce the density of fast states. Indeed, we observed that after PMA, the threshold voltage shifts to a smaller value, thus it can be sure that the i- nstability mechanism of present devices is dominated by the fast states creation. Finally, good performance of inverted stagger a-Si:H TFT's was obtained, they have threshold vol- tages of 2.73 - 4.68 ,ON / OFF current ratio is nearly to seven orders, field-effect mobility of 0.644 - 1.27 cm2/v.s ,subthreshold swing about 0.481 - 0.836 V/ decade, and Ion/W ratio of 5.7E-02 A/m which are suitable for the application in active matrix liquid crystal displays(LCD).