P通道金氧半電晶體元件在交流脈波工作下的特性

Abstract

本論文討論P通道金氧半電晶體元件的閘極在加以交流脈波時的基極幾何 分量電流,此電流乃因在關閉暫態時電洞由倒轉層射入基極所致。當汲源 極皆接地時,長通道金氧半元件的基極幾何分量電流大於短通道的;然而在 汲極加偏壓下,寄生的雙載子效應與因加於閘極的交流脈波所感應的汲源 極偏壓此二種雙重效應會導致短通道金氧半元件的基極幾何分量大量增 加,反而比長通道金氧半元件的還大。而此因加於閘極的交流脈波所感應 的汲源極偏壓主要乃導因於當交流脈波於切換時由於外接導線本身電感的 作用所產生的感應電壓,在本論文中提出一個等效電路來模擬此因加於閘 極的交流脈波所感應的汲源極偏壓, SPICE模擬的結果與量測的結果一致, 證實此等效電路的正確性。 In this thesis, the substrate geometric component current of the PMOSFET devices under AC pulse operations is investigated and analyzed. This current is due to holes in the inversion layer injecting into the bulk during turn-off transient and recombining in the bulk with elections. It is found that the geometric component currents of the long channel devices is larger than that of the short channel devices with grounded source and drain. However, the geometric component currents of the short channel devices with the drain biased at a fixed voltage increase significantly due to both the parasitic bipolar effect and the gate pulse-induced source and drain bias fluctuation effect. The current is larger than that of the long channel devices with the same bias. The gate pulse-induced source and drain bias fluctuation is mainly due to the wiring inductances which induce some voltage changes during the turn- on or turn-off transient of the gate pulse. In this thesis, an equivalent circuit is proposed to simulate the gate pulse- induced source and drain bias fluctuation in SPICE. The simulation results consistent with the measured results in the experiments. This proves the correctness of the proposed mechanism and the equivalent circuit.