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dc.contributor.author趙豊昌en_US
dc.contributor.authorChao, Li-Changen_US
dc.contributor.author唐麗英en_US
dc.contributor.authorTong, Lee-Ingen_US
dc.date.accessioned2014-12-12T02:11:55Z-
dc.date.available2014-12-12T02:11:55Z-
dc.date.issued2008en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009133805en_US
dc.identifier.urihttp://hdl.handle.net/11536/57856-
dc.description.abstract積體電路的製作技術日趨精密,然無論如何改善製程技術,其產品的良率仍無法達到100%。造成積體電路產品良率損失的最主要原因,乃是晶圓上產生的缺陷。隨著晶圓面積的增大,缺陷出現群聚現象,以往常用之卜瓦松良率模式(Poisson Yield Model)會因低估良率而不再適用。近年來,許多中外文獻針對晶圓之缺陷群聚現象而提出一些良率模式,然而這些良率模式各有不完善之處。如:負二項良率模式(Negative Binomial Yield Model)則因其中的缺陷群聚參數 值過於散亂,同時也可能為負值,而造成分析良率時的不便;複合卜瓦松良率模式(Compound Poisson Yield Model)雖然預測的良率較卜瓦松良率模式準確,但模式的建構卻相當複雜,較不易為業界所用。而Jun et al.以迴歸分析法所建構之良率模式,其模型之適配度與資料是否違反迴歸模型的假設都是值得考慮的。利用倒傳遞網路構建之良率模式則必需經由適當地設定網路參數才能得到較佳的預測結果。此外,目前半導體晶圓資料分析仍是以人工的方式分析晶圓上缺陷的空間樣式來找出製程變異的可能原因。然而人工判定除了費時外,亦可能因誤判進而影響偵測製程變異的準確性。有文獻提出一些晶圓缺陷樣式辨識方法來判定製程是否異常,但皆有其不完善之處。因此,本研究的主要目的是要發展一個整合良率預估模式及缺陷樣式辨識之晶圓缺陷診斷系統。本研究利用一般迴歸神經網路(General Regression Neural Network, GRNN)來構建良率模式,並利用多類別支撐向量機(Multi-class Support Vector Machines, Multi-class SVM)來構建一個晶圓缺陷樣式辨識系統;最後整合成一個良率預估模式及缺陷樣式辨識之晶圓缺陷診斷系統。本研究最後以模擬實驗來說明本研究所提之整合良率預估模式及缺陷樣式辨識之晶圓缺陷診斷系統的可行性;並進一步與現有文獻所提之良率預估模式與缺陷樣式辨識系統進行比較以驗證本研究的有效性與優越性。zh_TW
dc.description.abstractWafer yield is a highly effective means of evaluating the process capability of integrated circuit manufacturers. The defect number and cluster intensity of defects on a wafer are two critical factors influence wafer yield. As wafer sizes increase, the clustering phenomenon of defects increases. Clustered defects cause the conventional Poisson yield model underestimate actual wafer yield. The cluster parameter □ of the negative binomial model can be very scattered and negative when the model is applied to predict yield. Compound Poisson yield models are complicated. The degree of fitness for regression model must be considered when the regression methods are utilized to model the yield. Obtaining good prediction network requires substantial effort to identify the parameters of back-propagation neural network. Although some yield models consider the effects of defect clustering on yield prediction, these models have some drawbacks. Furthermore, the possible causes of process variation can be found out by operators through analyzing the defect pattern on a wafer. Judging the process by operators can waste time and the accuracy of process detecting can be influenced due to the erroneous conclusion. Although some recognizing methods for defect pattern on a wafer were proposed, these recognizing methods still have some flaws. This study presents a novel wafer defect diagnostic system that utilizes a general regression neural network integrating a multi-class support vector machines to predict the wafer yield and recognize the defect pattern on a wafer. A simulation study is utilized to demonstrate the effectiveness of the proposed method.en_US
dc.language.isozh_TWen_US
dc.subject積體電路zh_TW
dc.subject缺陷zh_TW
dc.subject群聚現象zh_TW
dc.subject良率模式zh_TW
dc.subject一般迴歸神經網路zh_TW
dc.subject樣式辨識zh_TW
dc.subject支撐向量機zh_TW
dc.subjectIntegrated circuiten_US
dc.subjectdefecten_US
dc.subjectclustering phenomenonen_US
dc.subjectyield modelen_US
dc.subjectgeneral regression neural networken_US
dc.subjectpattern recognitionen_US
dc.subjectsupport vector machinesen_US
dc.title整合良率預估及缺陷樣式辨識之晶圓缺陷診斷系統zh_TW
dc.titleConstructing a Wafer Defect Diagnostic System by Integrating Yield Prediction and Defect Pattern Recognitionen_US
dc.typeThesisen_US
dc.contributor.department工業工程與管理學系zh_TW
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