標題: 高能量離子佈植0.35um反擴散分佈雙井CMOS製程研究
0.35um Retrograde Twin-well CMOS Process By High-Energy Ion Implantation
作者: 楊知一
Ji-Yi Yang
張國明 羅正忠 簡山傑
K.M Chang;J.J.C Lou;S.C Chien
電子研究所
關鍵字: 高能量離子佈植;反擴散雙井;互補式金氧半場效電晶體;High-Energy Ion Implantation; Retrograde Twin-well; CMOSFET
公開日期: 1993
摘要: 在互補式金氧半場效電晶體製程技術中,高能量離子佈植反擴散井已被提 出來取代傳統擴散井,此技術可降低基板阻值,減少寄生電晶體作用,從 而增加元件密度,朝極大型積體電路領域邁進。在本論文中,高達九十萬 電子伏特的N型井與三十六萬電子伏特的P型井,以及各種防穿透佈植劑 量和不同的汲極工程,例如,少量佈植汲極,包圍佈植將被探討。其結果 我們將由電流和電壓特性曲線,基板電流,臨界電壓,窄通道效應,短通 道效應,基體效應,漏電電流,寄生電晶體效應及次臨界擺動等多方面來 說明和解釋其間的關聯性。經由我們的實驗數據顯示,包圍佈植有較大的 能力防止短通道效應,且不使飽和電流低於規格以下,而高能量離子佈植 ,亦同時顯出其優越的絕緣特性而不增加基體效應,確具有省去通道停止 佈植佈驟,減少製程時間,增加元件密度等功能。 In CMOS processing technologies, the retrograde-well process has been proposed to replace the conventional diffusion well. This process can low the substrate resistance, reduce the process time and the parasitic BJT influence, and increase the density of elements. In this thesis, 0.35um retrograde twin-well CMOS process including 900keV implantation energy for N-well, 360keV implantation for P- well, various doses of punchthrough stopper implantation, and different drain engineering, suck as, LDD, Pocket, are developed and disscussed. The result of CMOS device performance and the relations among these processing conditions are analyzed and addressed from the I- V characteristic, substrate current, threshold voltage, narrow width effect,short channel effect, body effect, turn off leakage , parasitic BJT effect, and subthreshold swing. From our experiments, pocket implantation has larger improvement on short channel effect without decreasing saturation current seriously. In addition, high energy implantation display its excellent isolation capability without increasing body effect. That is, it indeed can eliminate the channel stopper implantation, reduce the process time, and increase the elements density.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT820430048
http://hdl.handle.net/11536/58048
顯示於類別:畢業論文