場發射元件之研製與模擬

Abstract

近年來,由於微小尖端場發射陣列製作技術的進步，而使得更多的研究人 員進入真空微電子的領域中。對場發射形式的電子源而言，1-10 MV/cm的 高電場才足以有效的克服穿遂障礙。有幾種方式可以達成降低此種場發射 元件的操作電壓。首先，元件微小尖端的半徑愈小愈好。第二，降低射極 與閘極之間的距離。第三，具有較低工作函數的材料做為場發射元件的材 料。在此論文中，我們展示了一種自我對準的技術來製作場發射元件。並 且利用側邊氧化來形成元件所需的微小尖端。這種技術使得製作程序簡單 而且閘極的開口比原來光罩的尺寸小，並且此微小尖端自動對準於閘極的 中央。此外射極尖端化､閘極與矽基板之絕緣層､小的閘極開口以及不同 的射極尖端至閘極高度均可利用此項技術來達成。利用這種技術，我們成 功的製作了不同形狀的火山口型閘極元件。為了探討火山口型閘極元件的 特性，我們發展了一個二維的場發射元件模擬器。元件具備平面型與火山 口型閘極在此論文中均被模擬。我們發現閘極的形狀效應對元件的特性有 著重要的影響。此外，我們亦探討了元件的幾何形狀參數：包括了射極的 斜角，閘極至射極的相對位置，及閘極的開口等對元件特性的影響。 Advances in the fabrication of arrays of micro-scale gated field emitters over the last two decades have encouraged more workers to enter the field of vacuum microelectronics.In a field- emission-type electron source, a high field of 1-10 MV/cm is required to effectively overcome the tunneling barrier. There are several ways to reduce the operating voltage. First,the tip radius can be made as small as possible. Second, the distance between emitter and gate can be reduced. Third, a material with a low work function can be used.To this end, we fabricate self-aligned field emission devices using lateral oxidation sharpening technology. This process is simple and the gate aperture is smaller than the original mask size. Devices with volcano-shaped gate of various geometries are fabricated. To study the characteristics of the volcano devices, we develope a 2-D FED simulator that can handle arbitrary device structures.Devices with planar gate and volcano- shaped gate are evaluated in our study. We find the gate geometry effect plays an important role on device performance. The effects of device geometry parameters including the tip angle,the related tip-to-gate height,the emitter shape and the gate aperture on the device performance are also studied in this thesis.