Full metadata record
DC Field | Value | Language |
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dc.contributor.author | 廖修漢 | en_US |
dc.contributor.author | Shiou-Hann Liaw | en_US |
dc.contributor.author | 雷添福 | en_US |
dc.contributor.author | Tan-Fu Lei | en_US |
dc.date.accessioned | 2014-12-12T02:12:12Z | - |
dc.date.available | 2014-12-12T02:12:12Z | - |
dc.date.issued | 1993 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT820430067 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/58069 | - |
dc.description.abstract | 在本論文中,將使用複晶矽和非晶矽的各種組合來探討複晶矽化鎢閘極的 特性. 首先我們研究三氯氧化磷摻雜雙層複晶矽加上沉積矽化鎢的閘極, 以及摻雜非晶矽加複晶矽再沉積矽化鎢的閘極.結果非晶矽加複晶矽的組 合可得到較高飽和汲極電流. 這是由於經過約 900度的高溫退火後,使得 非晶矽的結構變成等晶軸的晶胞,而複晶矽成直條狀的晶胞,我們可知道非 晶矽加複晶矽的結構,將可阻止氟原子擴散至閘極氧化層的數量,結果等效 閘極氧化層厚度減少,而氟原子是來自沉積矽化鎢的副產物.另外我們研究 植入硼雜質的複晶矽化鎢閘極,在高溫回火後,硼雜質閘極分佈情形. 結果 在我們實驗中,覆蓋複晶矽在矽化鎢上可防止硼雜質擴散至矽化鎢表面上, 而減少無簡併性能階的形成,這是由於矽化鎢在高溫重長晶胞時,和氧化層 所產生的應力缺陷,造成硼原子快速擴散至缺陷處,來消除矽化鎢與氧化層 界面的應力. 且覆蓋複晶矽還有另一方面好處,那就是在高劑量硼氟植入 形成淺接面源極的同時,將損傷到閘極的矽化鎢,致使大量的矽原子在高溫 回火時,快速擴散至矽化鎢的表面,而得到較差的閘極片阻值,如果我們把 植入硼氟的損傷深度控制在覆蓋複晶矽內就可使矽化鎢內的鎢對矽成份比 不會降低,而使得閘極的片阻值降低. 這符合我們在超大型積體對閘極低 阻值的要求. In this thesis,the polycide gate formed by a stacked amorphous- silicon(α-Si)/poly-silicon structure with CVD tungsten silicide have been studied. Fisrt,the N+ polycide gates ofα-Si/ poly-Si or poly-Si/poly-Si with POCl3 diffusion and CVD WSi were fabricated. For these structures after the annealing process at 900℃ for 30 minutes,we observed that the gate oxide ofα-Si/poly-Si/WSi structure contains less flourine atoms than poly-Si/poly-Si/WSix.As a result the effective gate oxide thickness ofα-Si/poly-Si/WSi is thinner than that of poly-Si/ poly-Si/WSi. Second, the P+ polycide gates ofα-Si/poly-Si/WSi with a cap of poly-Si on the WSi were studied.We obtained that the cap poly-Si layer above WSi pevented out-diffusion of boron to WSi surface, which will produce depletion gate. Moreover, the cap poly-Si could get the lower sheet resistance polycide. When we implant dopant to form shallow of the junction source and drain, the WSi was damaged.The cap poly-Si held on damage layer and resulted in tungsten/silicon ratio no change. Hence, for the electrical characteristics,the cap poly-Si process is an appropriate choice for the P+ polycide gate. | zh_TW |
dc.language.iso | en_US | en_US |
dc.subject | 複晶矽化鎢閘極;等晶軸晶胞;直條狀晶胞;硼閘質擴散;簡併性能階. | zh_TW |
dc.subject | CVD tungsten silcide;floutine atoms;effective gate oxide thickness;sheet resistance;depletion gate; | en_US |
dc.title | 使用沉積矽化鎢與複晶矽和非晶矽結構形成之複晶矽化鎢閘極之研究 | zh_TW |
dc.title | The study of polycide gate formed by CVD tungsten silicide with amorphous/poly crystalline silicon | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |