标题: 新型互補式金氧半高速類比數位轉換器之設計與分析
Analysis and Design of a New CMOS High-Speed A/D Converter
作者: 劉瑞謙
Jui-Chien Liu
吳重雨
Chung-Yu Wu
電子研究所
关键字: 類比數位轉換器;數位錯誤修正;最小有效位元.;A/D converter(ADC);digital error correction;LSB.
公开日期: 1993
摘要: 在本論文中,一個新型八位元互補式金氧半高速類比數位轉換器被提出來
。此類比數位轉換器是以兩級(two-step)的架構來實現。此結構不需要用
到高增益或大輸出擺幅的操作放大器來設計。修正過的時間時序是用來改
善速度且八位元解析度仍然可藉由數位錯誤修正來達到。為了改善轉換速
率提昇到兩倍的速度,平行處理也被應用在兩個並聯連接的類比數位轉換
器。此線性誤差在二分之一最小有效位元之內。軟體的模擬結果顯示並聯
的類比數位轉換器的輸出率可有60百萬赫茲且有八位元解析度。
In this thesis, a new 8-bit CMOS A/D converter is proposed. The
A/D converter is implemented by the two-step architecture. The
structure can be designed without the need for the operational
amplifiers with either high gain or a large output swing. The
modified timing sequence is designed to improve the speed and
the 8-bit resolution is achieved by using digital error
correction. The parallel processing is also applied to the two
A/D converters connected in parallel to improve the conversion
rate up to 2 times speed. The linearity error is within □/2
LSB. The software simulation result shows the throughput rate
can be 60MHz with 8-bit resolution for the parallel A/D
converter.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT820430085
http://hdl.handle.net/11536/58088
显示于类别:Thesis