| 標題: | Fully static processor optimal assignment of data-flow graphs |
| 作者: | Ho, YC Tsay, JC 資訊工程學系 Department of Computer Science |
| 公開日期: | 1-五月-1997 |
| 摘要: | The data-flow graph (DFG) is an important graph-theoretic model for multiprocessor implementation of real-time digital signal processing (DSP) algorithms. Given a time schedule for a DFG,, we consider the problem of the processor-optimal assignment for a fully static schedule. Previously, the solution of this problem was found by solving an integer programming problem. In this letter, we propose a linear programming approach to solving the problem. |
| URI: | http://dx.doi.org/10.1109/97.575560 http://hdl.handle.net/11536/583 |
| ISSN: | 1070-9908 |
| DOI: | 10.1109/97.575560 |
| 期刊: | IEEE SIGNAL PROCESSING LETTERS |
| Volume: | 4 |
| Issue: | 5 |
| 起始頁: | 146 |
| 結束頁: | 148 |
| 顯示於類別: | 期刊論文 |

