多元處理機系統之共享記憶體子系統平行模擬評估環境之設計與建立

Abstract

共享記憶體多元處理機系統在最近已成為計算機系統架構設計的一個重要 趨勢。我們將設計一共享記憶體多元處理系統評估模擬環境，來探討多元 處理機系統共享記憶體子系統在設計上的考量。我們將採用 Interpreter 的模擬方式，並利用PVM（Parallel Virtual Machine）來設計模擬環境 ，以達到Parallel Simulation的效果。我們所設計的共享記憶體子系統 評估模擬環境，可提供Cache Coherence Protocol、 Memory Consistency Model、Two-Level Cache及Multiple-Bank Cache的模擬。 本篇論文將利用此模擬環境探討Cache Coherence Pr- otocol與 Prefetch Scheme對多元處理機系統效益的影響。經過模擬評估之後，我 們發現Cache Coherence Protocol的效能會受Processor Locality、 False Sharing以及Write Ratio影響，而在共享記憶體多元處機系統中， 採用Prefetch Scheme對系統效能未必有好處，這些結果提供系統設計者 做為重要的參考。 Recently, shared-memory multiprocessor systems have become one of the design trends in high-performance computer system architectures. In this thesis, we developed a shared-memory multiprocessor simulation environment to investigate the key design issues of shared memory subsystem in the shared-memory multiprocessor system. Based on the PVM (Parallel Virtual Machine) package, we designed a parallel simulation environment for the shared memory subsystem. This parallel simulation envi- ronment supports several configurable simulation modules, incl- uding cache coherence protocol, memory consistency model, two- level cache, and multiple-bank cache system. With this sim- ulation environment, we investigated the performance impacts of cache coherence protocols and prefetching schemes on the shared- memory multiprocessor. Through a great many of simulat- ion evaluations, we reached the following conclusions. The pe- rformance of a cache coherence protocol is affected by the pro- cessor locality, false sharing, and write ratio. Prefetching is not always benefitical in the shared-memory multiprocessor system.The important results can be referenced by the system designer.