完整後設資料紀錄
DC 欄位語言
dc.contributor.author龔執豪en_US
dc.contributor.authorChih-Hau Kungen_US
dc.contributor.author莊晴光 郭雙發en_US
dc.contributor.authorClive C. Tzuang and Shuang-Fa Guoen_US
dc.date.accessioned2014-12-12T02:13:40Z-
dc.date.available2014-12-12T02:13:40Z-
dc.date.issued1994en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT830430036en_US
dc.identifier.urihttp://hdl.handle.net/11536/59221-
dc.description.abstract此一設計由互補式-金屬-氧化-半導體(CMOS)電晶體構成,而電路之基本 原理係利用CMOS電晶體的平方律原則設計,共包含了乘法器電路,電壓- 電流與電流-電壓轉換電路,相位延遲電路,限制放大器電路,濾波器電 路以及數位的解調電路。 An all-CMOS FSK receiver IC has been designed and tested. It employs the square-law characteristic of CMOS transistors in saturated mode. The mixed-mode IC couples many functional blocks , a few linear voltage-to-current and current-to-voltage converters, one phase splitter for I-Q demodulation, one operational amplifier as an integrator in the phase-locked loop, a limiting amplifier before FSK signal demodulation, two cascaded sixth-order low-pass filters employing four 'Gm-C' elements, and a digital combinational logic for decoding the FSK signals coming out of the limiters in both I-Q arms.zh_TW
dc.language.isoen_USen_US
dc.subject頻移; 解調; 積體電路zh_TW
dc.subjectFSK; Demodulation; ICen_US
dc.title頻移鍵控解調積體電路zh_TW
dc.titleFrequency Shift Keying (FSK) receiver ICen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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