標題: NH3退火效應在複晶矽薄膜電晶體上之研究
Effects of NH3-Annealing on Polysilicon Thin Film Transistor
作者: 顏文正
Wen-Cheng Yen
李崇仁
Chung-Len Lee
電子研究所
關鍵字: NH3退火效應;複晶矽;薄膜電晶體;;NH3-Annealing;Polysilicon;Thin Film Transistor;TFT;
公開日期: 1994
摘要:   在本論文中,我們完整的研究低壓NH3退火效應結合氫化處理來改善複 晶矽薄膜電晶體的特性, 其中同時對N通道和P通道的複晶矽薄膜電晶體變 化不同的退火溫度, 時間和壓力條件來改變閘極氧化層和複晶矽薄膜內的 氮含量,結果發現經上面方法處理過的複晶矽薄膜電晶體會有比較好的閘 極波動率,臨界電壓載子,移動率和漏電流等。這個改善主要是由於氮釋放 並且鈍化了複晶矽薄膜電晶體內的strain鍵和dangling鍵, 因此氮的含量 將直接影響元件的特性,然而,當閘極氧化層和複晶矽薄膜內的氮含量太高 時,元件特性的改善將減小o對於NH3在長閘極氧化層前退火的N通道複晶矽 薄膜電晶體來說, 選擇一個在800℃退火40分鐘或900℃退火20分鐘的條件 加上氫化處理會有最好的特性, 而 P通道的薄膜電晶體最佳條件則是選 擇 900℃退火40分鐘加上氫化,但是對於NH3在長閘極氧化層後才退火的N 通道複晶矽薄膜電晶體來說,它的最佳化條件則是在900℃退火60分鐘加上 氫化。氫化處理前,NH3在長閘極氧化層前退火的複晶矽薄膜電晶體比 NH3 在長閘極氧化層後才退火的複晶矽薄膜電晶體有較好的特性;然而, 在氫 化處理後,NH3在長閘極氧化層後才退火的複晶矽薄膜電晶體比 NH3在長閘 極氧化層前退火的複晶矽薄膜電晶體特性上會有較大的改善。另外相較於 有氮化氧化層的MOSFET,經過NH3退火的N通道和P通道複晶矽薄膜電晶體不 管是在低閘極電壓或高閘極電壓下都會比沒經過 NH3退火的複晶矽薄膜電 晶體有較大的電導。 因此,退火過的N通道或P通道複晶矽薄膜電晶體會有 比較高的最高載子移動率。 In this thesis,we had complete investigated the joint effect of the low pressure NH3-annealing and the H2-plasma treatment to improve the performance of TFT's. Different temperatures, times and pressures were performed on both n- and p-channel TFT's. Above treated TFT's had better electrical characteristics. The improvement is believed to be due to nitrogen passivation effec When too much nitrogen was incorporated into the oxide and poly film, devices was improved only a little. An NH3-annealing at 800C for 40min or 900C 20min in combination with an H2-plasma treatment, before oxidation of n-channel TFT's, a optimum condition. For p-channel TFT's, the annealing condition was at 900C, 40min. However, for the NH3-annealing samples after oxidation in combination with the H2-plasma treatment, the optimum condition was 900C for 60min. The TFT's with the NH3 annealing brfore oxidation had better electrical characteristics.After the H2-plasma treatment, the TFT's with the NH3-annealing after oxidation had the larger electrical improvement. In contrast to the MOSFET with the nitrided-oxide, transconductance increased at low and high gate voltage for the NH3 annealing n- and p-channel TFT's.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT830430057
http://hdl.handle.net/11536/59245
Appears in Collections:Thesis