複晶矽薄膜電晶體製程及特性之研究

Abstract

在此論文中，我們探討了複晶矽薄膜之植入離子的的活化機構、複晶矽 薄膜電晶體的氫化技術、和以乙矽烷(Si2H6)沉積之非晶矽薄膜的固相再 結晶技術及其在複晶矽薄膜電晶體上的應用。首先我們探討了複晶矽薄膜 中的雜質活化之劑量效應，以砷離子或硼離子植入低壓化學氣相沉積之非 晶矽薄膜，再以不同溫度的爐管熱退火。對於低劑量的砷離子佈植試片， 我們發現其片電阻值在700至850C會隨退火溫度上升而增加，這種逆向熱 退火(reverse annealing)的現象是歸因於雜質擴散到複晶矽晶界析出( segregation)的結果，並且隨著離子劑量的增加，這種現象變得較不顯著 ，當劑量增加到1x1016cm-2，片電阻就隨退火溫度呈單調上升了。而對於 硼離子植入的試片，則觀察不到任何逆向熱退火的現象，這表示硼離子在 晶界析出的情形並不顯著。我們以霍爾量測和穿透示電子顯微鏡的分析， 探討了雜質的活化機制。 對於複晶矽薄膜電晶體的另一重要技術--氫化 ，我們提出了兩種新的方法來取代傳統的氫氣電漿處理，其一為笑氣(N2 O)電漿處理，此法比單純的氫氣電漿處理更能有效的減少複晶矽薄膜內的 缺陷密度，進而改善元件的電性。藉由二次離子質譜儀和歐傑電子分析儀 ，我們測量了元件中氫原子和氮原子的分布，氮原子來自笑氣的分解，而 氫原子應是來自殘餘說水氣的分解。這些在電漿處理過程中，藉著擴散進 入複晶矽通道及其和閘極介電層界面的原子，有效地降低了元件中的缺陷 密度。在熱載子效應測試上，因為氮的參與，元件的可靠度也改善了。再 者，經過笑氣電漿處理後，閘極介電層的漏電流和崩潰電壓也獲得了改進 。本文所提另一改善的方法為氨氣(NH3)電漿處理，此方法可獲致比傳統 氫氣電漿處理更佳的複晶矽薄膜電晶體電性、熱載子可靠度、及熱穩定性 的提升。這些改善是來自於氨氣分解產生大量的氫原子和氮原子，填補了 存在複晶矽內的缺陷及強化了複晶矽和閘極介電層界面間的鍵結。同樣地 ，閘極介電層經過氨氣電漿處理後，其特性也被改善了。 在非晶矽薄膜 的固相再結晶方面，是利用乙矽烷在低壓化學氣相沉積爐管中於600C的溫 度下進行，並利用X光繞射分析儀及穿透式電子顯微鏡研究再結晶後的複 晶矽特性。在475C的溫度下沉積的非晶矽，經過600C退火後，可得到最大 的晶粒，且在10小時可達成完全的再結晶。在相同的沉積溫度下，較大的 氣體流量、晶片間距或腔體壓力，可獲致較快的沉積速率，再結晶後也可 得到較大的晶粒和較佳的結晶度。此外，以不同條件沉積並再結晶所得的 複晶矽薄膜所製造的複晶矽薄膜電晶體的特性亦被提出比較：以較大的複 晶矽晶粒為主動層的薄膜電晶體能有效降低元件的漏電流。再者，我們也 應用了氨氣電漿氫化來改善元件的電性。 最後，本論文提出一種新的固 相再結晶方法，即兩階段的快速熱退火(two-step RTA)，來縮短再結晶時 間並得到特性優良的複晶矽薄膜。由這種新方法所得到的複晶矽晶粒大小 要比以往施以單一快速熱退火的要大得多，且和傳統爐管退火所得到的晶 粒大小相近。這是因為第一階段的低溫快速熱退火能形成少數的成核中心 ，而在第二階段較高溫的快速熱退火中長成較大的晶粒。應用此種兩階段 的快速熱退火所製造的複晶矽薄膜電晶體特性比單一快速熱退火的更佳， 且接近用傳統爐管退火所得到的薄膜電晶體特性。另外，關於載子的場效 移動率和元件的漏電流，以及成長在以不同再結晶方法所得的複晶矽薄膜 上的閘極氧化層特性，我們也比較了其中的差異。 In this thesis, we firstly discuss the dosage effect on dopant activation in polysilicon films. The arsenic (for n-type) and boron (for p-type) were implanted into low-pressure chemical vapor deposited (LPCVD) amorphous silicon(a-Si) films and then annealed in a furnace with different temperatures. For the arsenic-implanted specimens with dosage of 4E14 cm-2,an increase of sheet resistance was observed with increasing annealing temperature for the temperatures range from 700 to 850 C. The reverse annealing phenomenon is attributed to the dopant segregation at grain boundaries and becomes less marked with the medium doped (2E15 cm-2) films. Consequently, for the dosage of 1E16 cm-2, the sheet resistance exhibits a monotonic decrease with increasing annealing temperature. As for the boron- implanted samples, the reverse annealing phenomenon is not observed. It means that the dopant segregation is not significant for the boron-implanted films. In terms of Hall measurement and transmission electron microscopy (TEM), the mechanism of dopant activation is discussed. For hydrogenation of polysilicon thin-film transistors (poly-Si TFTs), two novel techniques have been proposed to replace the conventional H2 plasma treatment. One is the N2O plasma treatment, which is much more effective to passivate the trap states in the polysilicon channel than is pure H2 plasma; thus, the performance of polysilicon TFTs has been significantly improved. The distribution of N incorporated in the oxide and poly-Si films was examined by means of secondary ion mass spectroscopy (SIMS) and Auger electron spectroscopy (AES). It is believed that the nitrogen radicals dissociated from N2O gas as well as the hydrogen dissociated from residual H2O both can diffuse into the gate oxide/poly-Si interface and the channel layer to passivate the defect states. The hot-carrier reliability of TFTs was also enhanced after N2O plasma treatment due to nitrogen incorporation. Moreover, the gate-oxide leakage current significantly decreases and the oxide breakdown voltage slightly increases after applying N2O plasma treatment. The other technique to improve TFT performance is the NH3 plasma treatment. The NH3 plasma treatment show better defect- passivation effect on the electrical characteristics, hot- carrier reliability, and thermal stability than does pure H2 plasma treatment. These improvements were attributed to not only the hydrogen passivation of the defect states, but also the nitrogen accumulated at SiO2/poly-Si interface and the strong Si-N bond formation to terminate the dangling bonds at grain boundaries of poly-Si layers. As similar to N2O plasma treatment, the characteristics of the gate oxides have been improved after applying NH3 plasma passivation. Regarding the SPC of a-Si films, the films have been deposited with a variety of deposition conditions in an LPCVD reactor by thermal decomposition of disilane, and then crystallized by conventional furnace annealing (CFA) at 600 C. The crystallized poly-Si were characterized by means of x-ray diffraction and TEM. The full crystallization can be achieved by 600 C-CFA for 10 h and the largest grain size of poly-Si layers is obtained at deposition temperature of 475 C. With the same deposition temperature, large grain size and good crystallinity have been achieved in terms of large flow rate, wide wafer spacing, and high chamber pressure. The characteristics of poly-Si TFTs have been investigated with various deposition conditions of a-Si films and device structures. The TFTs fabricated in poly-Si with large grain size exhibit better device performance and the multi-gated TFTs can effectively reduce the leakage current. Furthermore, the performance of TFTs hydrogenated by NH3 plasma has been enhanced. Finally, a novel SPC technique, two-step rapid thermal annealing (RTA), is presented. This technique markedly shortens crystallization time of poly-Si and its grain size is larger than that of one-step RTA and even as large as that obtained by CFA. It is believed that the first low temperature RTA results in smal amount of nucleation sites and then these nucleation centers grow up to a large grain size during second high temperature RTA. Poly-Si TFT with active layers prepared by this two-step RTA have better electrical properties than those by one-step RTA, and comparable to those by CFA. In addition, the distribution of field-effect mobility and leakage current as well as gate oxides formed on differently crystallized poly-Si films are also discussed.