深次微米金氧半場效電晶體製程技術之穿透現象分析與模擬

Abstract

在深次微米金氧半場效電晶體之超大型積體電路元件中，穿透現象為其主 要受限的機制之一。當汲極電壓所產生的電場大幅地降低源極接面的能障 時，此現象便會發生。本論文利用製程技術程式與元件電性程式的模擬， 來預測元件在穿透模式下的特性。 @ 從結果看來，穿透電壓會隨著通 道長度縮小而減少，但是卻隨著閘極氧化層的厚度減少而增加，而各種摻 雜濃度的高低也會大大地影響穿透效應。除此之外，增加基底對源極的逆 向偏壓，穿透電壓將增加。更重要的是，由於熱效應所導致摻雜分佈曲線 範圍的調整，我們也可以從中觀察到穿透電壓的改變。 In deep sub-micron MOSFET VLSI devices, the punchthrough is one of the major limited mechanisms. It occurs when the electric field due to drain bias sufficiently reduces the potential barrier at the source junction. The simulation, which combines results of the process-simulation program and device-simulation program, is shown to predict the characteristics of the punchthrough mode of device operation. From the results, punchthrough voltage will decrease with the reduction of the channel length, but increase with the reduction of the gate oxide thickness. The implanted impurity concentration also influences strongly the punchthrough effect. Besides, increasing the reversed substrate-source bias is shown to increase the punchthrough voltage. Above all, owing to the adjustment of the implantation doping profile range by the thermal cycle, the change in the punchthrough voltage can be observed.