元件匹配之分析與模型於高精準之類比設計

Abstract

近年來，由於類比電路之速度與精準度不斷提升，元件匹配之準確分析便 益形重要，電路設計者需要元件參數確實的不匹配值，在電路操作模擬時 放入考量，以往的粗略估計已不足夠。在此論文中，我們提出了一套新且 有效求取不匹配參數之分析方法，及經由HSPICE模擬驗證能準確地複製汲 級電流誤差之模型。不匹配參數包含了臨界電壓，電流因素，與源/ 汲級 電阻不匹配，不同結構大小偏壓條件的五伏特邏輯 0.5微米互補式金氧半 場效電晶體(CMOS)經由此方法被分析，並得到了統計結果( 平均值與標準 差 )。藉由此數據我們證明了元件之匹配特性取決於結構對稱性，並討論 元件匹配對此製程條件之敏感度，同時從統計方法也發展了不匹配值與元 件大小關係之解析模型。除了分析元件不匹配參數之統計值外，我們從物 理和製程的觀點解釋與分析造成元件不匹配的原因，本論文可應用於從電 路佈局設計和製程條件來改善元件匹配。 In this thesis, we develop a novel characterization method and a effective model for device mismatch, which was proved by HSPICE simulations that it can actually reproduce the mismatch of drain current. The mismatch parameters include threshold voltage mismatch, current factor mismatch and source/drain series resistance mismatch. Based on different layout structures ,sizes, and bias conditions, a 5 V Logic, 0.5 um CMOS technology were analyzed by this method. Statistical data( mean value and standard deviation )were obtained. Based on these data, we prove that the matching property of device depends on the symmetry of layout structure and discuss the device matching sensitivity to the process conditions. Meanwhile, statistical methods are used to develop analytical models that correlate the mismatch to the device dimentions. In addition to the statistical analysis of mismatch parameters, the cause of mismatch from the points of physical and process steps are investigated. The application of this work can be used to improve the matching from layout design or process steps.