應用於顯示影像與繪圖之灰階再量化之分析與設計

Abstract

在顯示影像速度重於品質的考量下，以硬體實現的再量化處理不僅可節省 用於顯示的記憶體空間，並可加快以往用軟體處理的速度。一般經過前置 處理的影像必須經過再量化的處理才可在只能處理較少灰階或色彩的低階 顯示設備上，所以硬體實現的再量化處理有其重要性。在本篇論文中，我 們先對各種適合做即時處理(real time)的再量化方法作視覺上的( visual)、空間領域上的(space)、頻律領域上的(fre- quency)分析，並 將這些方法作一比較。最後我們考量顯示的品質、理論的背景及硬體的成 本，發現一般的視訊影像以誤差擴散法(error diffu- sion)處理，其結 果較為滿意；而電腦繪圖則以序顫法(ordered dither- ing)處理才不會 因為在去除隱藏面(hidden surface removal)的3D成像過程中產生多邊形 邊界著色時的突兀。本篇論文即以其合成的架構實現於晶片中，對於不同 來源之影像，在系統分辨後將其像素(pixel)送進此架構中，以達成節省 顯示的記憶空間並快速處理且與原影像在視覺上相似的目的。我們使用 Verilog模擬器來設計，並將其對映到台積的TSMC08的標準元件庫。 Hardware implementation for requantization can not only re- duce display memory space but also enhance the software proce- ssing speed when we emphasize display speed rather than quality. An image pre-processed must be requantized when it is displayed on a low level device, thus the quantization implemented in hardware shows much importance. In this thesis, we analyze various requantization methods which are suitable for real time processing in visual, spatial, and frequency aspects, and we make a comparison with these me- thods. At last, we trade off display quality, theoretical back- ground and hardware cost, and we see that the result of a video image processed by error diffusion would be appreciated, and an image from graphics processed by ordered dithering would not look sharp in edges of polygons when shaded with colors in the 3D randering process. This thesis implements the combined archi- tecture in chip, for different images from various sources, the architecture reduces display memeory, fast processes pixels and resembles the output images visually. We use Verilog to design and map the circuits to TSMC08 Standard Cell Library.