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dc.contributor.authorHuang, C. T.en_US
dc.contributor.authorTsui, Bing-Yueen_US
dc.contributor.authorLiu, Hsu-Juen_US
dc.contributor.authorLin, Geeng-Lihen_US
dc.date.accessioned2014-12-08T15:07:38Z-
dc.date.available2014-12-08T15:07:38Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-0636-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/6013-
dc.description.abstractThe impact of the high-voltage drift n-well (HVNW) and shallow trench isolation (STI) regions on the electrical characteristics of 32V symmetry and asymmetry n-channel laterally diffused drain MOSFET (N-LDMOS) were evaluated. Asymmetry structure has higher threshold voltage owing to the transient enhancement diffusion (TED) of boron near source region. The smaller extension of the HVNW to STI (E(HVNW-STI) for asymmetry structure exhibits a wider safe-operating-area (SOA) from the hot-carrier reliability point of view. To obtain a higher on-current, the EHVNW-STI should be optimized because the steep sidewall of the STI may force current to flow through a longer distance in the HVNW. Finally, increase of EHVNW-STI cannot efficiently increase breakdown voltage.en_US
dc.language.isoen_USen_US
dc.titleThe impact of high-voltage drift n-well and shallow trench isolation layouts on electrical characteristics of LDMOSFETsen_US
dc.typeArticleen_US
dc.identifier.journalEDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGSen_US
dc.citation.spage267en_US
dc.citation.epage270en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000254170700068-
Appears in Collections:Conferences Paper