鎖相迴路應用於腦電波之瞬間頻率偵測

Abstract

在這篇論文中，我們討論鎖相迴路的基本理論和一些特性，腦電波的頻 率偵測以及鎖相迴路的硬體實作。我們利用鎖相迴路電路做為偵測腦電波 頻率的工具。鎖相迴路被廣泛的使用於通訊領域中。一般而言，鎖相迴路 在處理單一高頻訊號時，成效相當好。然而腦波訊號是低頻而且有多個頻 率組成的訊號。為了開發能即時偵測腦波瞬間頻率的系統，我們首先藉由 電腦模擬來觀察鎖相迴路的特性。在此研究過程中，我們將探討它在低頻 和高頻環境的特性及工作情形。藉由此觀察，我們對鎖相迴路的結構稍做 修正，其修正後的系統將得以偵測到腦波的頻率。 為了進一步去驗證模 擬的結果，我們將 PLL的硬體系統設計並製作出來，用來處理模擬的低頻 訊號，得到的結果和電腦模擬是非常相近的。從這個初期研究工作□，鎖 相迴路是可以用於偵測腦波頻率的。 In this thesis, we discuss the fundamental theory and characteristicof phase locked loop ( PLL ), detection of the frequency of EEG signals,and hardware implementation of PLL circuits. We apply PLL to detectionof the frequency of EEG signals. PLL has been widely used in communicationsystems. In general, PLL performs well for high-frequency, pure sinusoidalsignals. However, EEG is a low-frequency and multi- component signal. In consideration of developing a real-time instantaneous frequency detection for EEG analysis, we begin with investigation of fundamental propertiesof PLL through computer simulatiion. The performance of PLL under both low- frequency and high-frequency situation is analyzed. It is found a modification of the PLL enables detection of time-varying frequency ofEEG. To further verify results of simulation, a hardware-realized system isdesigned and implemented to simulated low-frequency signals. Results of frequency detection by the hardware PLL system agree with which of computersimulation. From this preliminary research work, PLL is feasible for real- timedetection of EEG's frequency.