Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 莊孫文 | en_US |
dc.contributor.author | Chuang, Sun-Wen | en_US |
dc.contributor.author | 曾憲雄 | en_US |
dc.contributor.author | Shian-Shyong Tseng | en_US |
dc.date.accessioned | 2014-12-12T02:15:15Z | - |
dc.date.available | 2014-12-12T02:15:15Z | - |
dc.date.issued | 1995 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT840394017 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/60459 | - |
dc.description.abstract | 在本篇論文中, 我們主要是針對平行編譯器中的迴圈轉換方式來加以改 善. 異於傳統模式, 我們利用知識庫的觀念、方法來整合現存的迴圈轉換 並擷取各個迴圈的優點. 我們提出了一個基於知識庫的迴圈轉換方式, 簡 稱 KPLT,這是一個利用表格擷取式的分析和屬性擇序表的專家系統. KPLT 跟據迴圈不同的特性來選擇一個適當的轉換方式且利用選擇之方式進行轉 換. 異於以往單一階段的迴圈轉換, 我們採用多階段的方式以更加充分地 將迴圈中的平行度擷取出來. 藉由實驗, KPLT 顯示出更高的加速效果; 另一方面, 藉由知識庫的模式將使系統易於管理和修增. In this thesis, we concentrate on fundamental phase, parallel loop transforma-tion, for loop parallelization in parallelizing compilers, running on multipro-cessor systems. We first proposed a knowledge-based approach that integrates existing loop transformation methods to make good use of their ability to extract available parallelisms on loops. A rule-based system, calledthe knowledge-based parallel loop transformation (KPLT), is then developed by repertory gridanalysis and an attribute ordering table to construct the knowledge base. TheKPLT can choose the appropriate loop transformation methodto reorder the execution of statements and loop iterations for parallelization. Unlike the previousresearch that must of them use one-pass approach, we intro-duce the idea ofmultipass which may explore more parallelism of loops. Experimental results show that our method can achieve higher speedup on parallelizing compilers. Furthermore, for system maintenance and extensibility,our approach is obviouslysuperior to others. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 迴圈轉換 | zh_TW |
dc.subject | 平行編譯器 | zh_TW |
dc.subject | 專家系統 | zh_TW |
dc.subject | 表格擷取分析 | zh_TW |
dc.subject | 屬性擇序表 | zh_TW |
dc.subject | 多處理機系統 | zh_TW |
dc.subject | Loop transformation | en_US |
dc.subject | Parallelizing compiler | en_US |
dc.subject | Expert system | en_US |
dc.subject | Repertory grid analysis | en_US |
dc.subject | Attribute ordering table | en_US |
dc.subject | Multiprocessor system | en_US |
dc.title | 基於知識庫之迴圈轉換 | zh_TW |
dc.title | An Effective Knowledge-Based Parallel Loop Transformation for Parallelizing Compilers | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
Appears in Collections: | Thesis |