SnTe摻雜GaSb與低溫成長InGaAs/GaAs超晶格之電性研究與缺陷分析

Abstract

利用導納頻譜分析研究成長在強烈晶格不匹配之GaAs基板上的SnTe- doped GaSb薄膜缺陷特性, 在所有不同五三比(Sb/Sub4//Ga BEP 比值 2-9)的樣品中, 皆觀察到一相同深層缺陷能階離導帶約0.23到0.26eV. 缺 陷濃度隨磊晶五三比增加呈現先減少再升高的變化, 比值為7時缺陷濃度 呈現一最小值. 在低五三比值下所成長之薄膜, 往往造成高濃度的Sb空位 或者Ga/SubSb antisite缺陷, 提高五三比有助於降低其濃度, 因此從缺 陷濃度對五三比的變化看來,所觀察到的0.26eV深層能階應屬於此種機制, 但當五三比BEP值大於7時, 缺陷濃度隨五三值的上升有明顯增加, 顯示還 存在另一種的機制. 而當BEP比值過大時, 造成Sb分子過多而易形成Sb/ SubGa antisite, 因此推測缺陷濃度增加可能是此種原因所貢獻.所以總 結來說, 此一缺陷應該不是單純是undoped材料中由於Sb空位和Ga/SubSb antisite形成residual acceptor機制所形成, 而應該是更複雜的機制, 有可能是Sb空位, Ga/SubSb和Sb/SubGa的複合缺陷. 在低溫成長InGaAs/ GaAs超晶格結構研究上, 我們利用DLTS與暫態電容的方法明顯觀察到三個 缺陷能階E1(0.73eV), H1(0.43eV)與H2(0.7eV), 其中E1為一多數載子缺 陷, H1與H2為少數載子缺陷. 由於E1能階亦存在於正常溫度成長之超晶格 結構中, 故推測形成原因為InGaAs跟GaAs介面間晶格不匹配所造成如 dislocation等缺陷. 此外在正常溫度的超晶格結構中均未觀察到少數載 子缺陷, 故H1與H2可能是由於低溫成長所造成. 跟單純低溫成長P-LT-N結 構中所觀察到的缺陷結果相比較, H1與P-LT-N中由暫態電容所量測到推論 可能跟As-precipitate有關的缺陷在阿瑞尼斯圖上有相近的位置, 故可能 是由於低溫成長之GaAs所造成. 而缺陷H2的詳細形成原因仍不清楚, 不過 從其DLTS訊號峰值對不同速率窗有明顯變化, 在t1越大時, 峰值越小的情 況顯示可能缺陷在捕捉載子的過程中亦存在一位能障, 這現象在P-LT-N中 亦觀察到. The GaSb layers investigated were grown directly on GaAs substrates by molecular beam eiptaxy(MBE) using SnTe source as the dopant. By using admittance spectroscopy, a dominant deep level with the activation energy of 0.23-0.26 eV was observed and its concentration was affected by Sb/Sub4//Ga flux in the MBE growth. A lowest deep-level concentration together with a highest mobility was observed for GaSb grown at 550C under a Sb/ Sub4//Ga BEP ratio of around 7, which should correspond to the lowest ratio to maintain a Sb-stabilized surface reconstruction. In addition, optical properties of an undoped, a lightly and heavily SnTe-doped GaSb layers were studied by comparing their photoluminescence spectra at 4.5K. The low temperature InGaAs/ GaAs superlattice grown by molecualr beam epitaxy were investigated by using P-LTSL-N structure. Two normal-temperature grown InGaAs/GaAs superlattice with P-SL-N structure were grown for comparison. By using capacitance transient and deep level transient spectroscopy(DLTS), three dominant deep level E1, H1 and H2 were observed with activation energy of 0.73 eV, 0.43 eV, 0.7 eV, respectively, in sample P-LTSL-N. Among of them, E1 is majority-carrier trap and the other two are minority-carrier traps. The activation energy and capture cross section of E1 is similiar to the deep levels detected in another two normal P-SL- N samples. If we accept that the deep level seen in these samples are the same one, the fact that this level appeared in all InGaAs/GaAs superlattice indicates that it is possibly caused by misfit dislocations in InGaAs/GaAs interface. On the other hand, the fact that the minority-carrier traps were only observed in P-LTSL-N sample, suggesting that H1 and H2 were related to low-temperature growth. Compare with the deep levels in P-LT-N structure on Arrhenius plot. H1 is similiar to the hole trap with activation energy of 0.38 eV observed by admittance spectroscopy. From the partial-filling FLTS signal, we observed that H2 has a activation energy in the capture process, the same feature observed in P-LT-N sample.