以矽硼層做為擴散源在P型閘極電容之硼穿透抑制之研究

Abstract

在本論文中，使用矽硼層做為P型複晶矽閘極源之新技術已經被提出以取 代傳統之BF2+植入技術，此技術能有效抑制硼穿透效應。SIMS分析清楚的 顯示在以BF2+植入之晶片中由於大量氟原子侵入氧化層，硼穿透變得更嚴 重。相對的，在Si-B之晶片中硼穿透能有效地抑制。我們首先研究使用 Si-B和BF2+閘極電容之硼穿透效應和溫度之關係，結果顯示Si-B晶片VFB 和Vth有較少的偏移。此外，它也有較小的漏電流和電子補捉率，較大的 崩潰電場和崩潰電荷。即使降低溫度和使用SAP結構，Si-B晶片仍然比 BF2+晶片有較好的特性。另一方面，我們也研究硼穿透效應對不同活化時 間之關係，也得到相同的結果。因此，使用矽硼層當做P型閘極之擴散源 是一個好的選擇。 In this thesis, a novel doping technique for the p+ polysilicon gate by using Si-B layer has been studied to substitute the conventional BF2+ implantation process. The retardation of boron diffusion is significantly achieved by employing the Si-B layer as diffusion source. Clearly, from the analysis of secondary ion mass spectrometry (SIMS) we have that fluorine atomssegregate in the gate oxide for the BF2+-implanted samples, so the effects ofboron penetration through thin oxide layer are pronounced. In contrast, the penetration of boron atoms are obviously suppressed for Si-B samples because of the absence of fluorine atoms. The comparisons of the boron penetration effects dependence on the annealing temperature for the Si-B and BF2+-implanted gate capacitors have been studied. It is found that there are much less shifts of the flat-band voltage and threshold voltage for the Si-B samples as the annealing temperature increased. Besides, samples with the Si-B layer source have lower leakage current, lower electron trapping rate, higher breakdown field, and higher charge-to-breakdown. We have also investigated that as lowering the annealing temperature to 850*C and using the SAP gate structure, the Si-B samples have better performance than the BF2+ samples. On the other hand, the effects of boron penetration by using Si-B layer as gate source with different annealing time have also been studied. The results are the same as mentioned above. Therefore, the p+ gate used the Si-B layer as diffusion source is a good choice for the MOS devices application.