以 ITS 技術形成鈷自行校準矽化物於P+複晶矽閘極之研究

Abstract

本實驗工作乃研究使用鈷自行校準矽化物利用ITS 技術去壓制硼的穿透效 應。本論文使用的矽化物薄膜厚度為150,300A 和450A。在較薄的鈷矽化 物厚度中,溫度對片阻值的影響被觀察到。我們也發現薄的矽化物高溫時 熱穩定性可以被 BF2+ 佈值大大改善。平直電壓對快速熱處理退火溫度和 高頻電容-電壓特性亦被量測。硼擴散的延遲可藉由氟在非晶矽 p型閘中 被抓取而被達到, 此乃由於氟在非晶矽中有較低的擴散速率。鈷自行校準 矽化物薄膜充當佈植劑量的能量障礙和擴散源,若使用相同的佈植與回火 條件,則較淺的佈植能被獲得。崩潰電場與崩潰電荷對回火溫度的曲線被 量測。我們發現非晶矽和鈷自行校準矽化物的使用對某些製程條件並不會 衰減閘層氧化物的可靠度, 且能壓制硼的穿透。針對非晶矽與複晶矽閘做 一比較, 在非晶矽閘中較少的硼穿透發生。因此硼從矽閘擴散進入基體能 被應用非晶矽閘所大大改善。在這研究中我們也發現在閘極氧化物中電子 抓取效率隨著硼的穿透而增加。因此非晶矽層閘極結構的電容表現出較低 的電子抓取效率和較高的崩潰電荷。 The work study the use of Co salicide technology on p+ poly gate by using ITS technology to suppress the boron penetration. Silicide films with thicknesses of 150,300 and 450A were studied in this thesis.The influence of temperature on sheet resistance were observed for thinner coablt silicide thickness. We also found that the high temperature stability of thin silicide film can be significantly ameliorated by BF2+ implantation. The curves of flat band voltage versus rapid thermal annealing temperature and Quasi-static C-V,High frequency C-V were measured.The retardation of boron diffusion is achieved by the trapping of fluorine in the amorphous layer P type gate due to a lower diffusion rate of fluorine in amorphous silicon layer.The Co salicide film acts as an energy barrier and diffusion source for implanted ions and thus shallower implant can obtained with the same implantation and annealing condition. The curves of EBD and QBD versus annealing temperatures were measured. It is found that the use of amorphous silicon gate and Co salicide didn't degraded gate oxide reliability for some process condition but it can suppress boron penetration for P+ poly gate MOS capacitor. In comparison with a-Si and polysilicon gate,less boron penetration occurs in the a-Si gate. Hence ,the boron diffusion from the silicon gate into the substrate can be significantly improved by employing the a-Si gate.In this study,we also found that the electron trapping efficiency in the gate oxide increase with boron penetration .Therefore,the capacitors with a-Si gate structure exhibit lower electron trapping efficiency and higher value of charge to breakdown