可程式化1.28GHz寬頻除頻器模組

Abstract

信號產生器為達到好的相位雜訊（Phase Noise），一般皆以產生高頻信號，而後加以降頻至低頻而得到全頻率的信號。在這裡我們完成一個除頻器（frequency divider）模組，並且產生一640MHz本地振盪信號提供給混波器（mixer）產生100KHz~160KHz信號。主頻率640~1280MHz經過模組且加以程式控制便產生全頻率信號（100kHz~1280MHz）且相位雜訊達-130dBc/Hz。其中將設計數個串接除頻器、High Q濾波器、及控制用的開關（Switches）、寬頻放大器、混波器、頻濾倍頻器、壓控振盪器（VCO）及頻率合成氣器（frequency Synthesizer）等。 在除頻器模組中，我們設計量測NEC之UPB581、UPB584、UPB565 ; GEC Plessey之SP8605，在相位雜訊、輸出功率上比較其結果，作為我們主要除頻元件。對濾波器而言，設計低通濾波器（LPF）參考Elliptical型式設計，使Stop Band皆小於-40dB，如此能使由除頻器所產生之諧波消除。帶通濾波器則希望頻寬（bandwidth）越窄越好。開關由於整體電路需要，我們設計了SPDT、SP3T。在SPDT上設計了4種結構並比較其在損失（Loss）、隔離度（Isolation）之響應，使隔離度在1.28GHz時能有-30dB以上，使開關能有效阻隔信號，對後接電路不造成影響。放大器則希望在160~640MHz頻寬中能有10dB增益（Gain）且S11、S22皆能小於-15Db，使輸入和輸出端能匹配產生最大功率傳遞。 為了提供640MHz本地振盪器我們設計兩種方法。第一種是使用一非常穩定且精確的晶體振盪器40MHz倍頻4次，中間以帶通濾波器濾絕不必要信號後串接兩級放大器得到功率7dBm，相位雜訊-104dBc/Hz(10KHz offset)之640MHz振盪源。另一種以共射極（common Emitter）方式設計一窄頻之低相位雜訊VCO，並以集總元件L、C形成共振電路而振盪，配合頻率合成器配合鎖住640MHz，相位雜訊達-104dBc(10KHZ offset)，後接放大器使功率得到7.5dBm。

In this thesis we design a wideband, lower phase noise frequency divider module that phase noise is as low as -130dBc/Hz(offset 10KHz) and generate a 640MHz local oscillator to support mixer generating 100KHZ-160MHz. Frequency is covered from 100kHz extend to 1280MHz. Module include some frquency dividers, high Q filters, control switches, wideband amplifiers, frequency doublers, Voltage Control Oscillators (VCO). After finishing all component's design and test, we try to integrate it and generate a high performance, high Q signal. In frequency divider module, we test NEC company's UPB581, UPB584, UPB565, GEC Plessey's SP8605 frequency dividers and compare its phase noise and output power. We design and compare elliptical and chebyshev fonts low pass filter(LPF) in the high frequency's response. LPF will isolate signal 40dB in stop band and pass signal in pass band. Design a narrow bandwidth band pass filter(BPF) to reject the unwanted signal. Design single pole double throw(SPDT) and single pole 3 throw(SP3T) switch. We compare 4 style SPDT's loss and isolation then choose the best one to be our control component. We design a 10dB gain, matched 160-640MHz wideband amplifier to compensate system gain and a high gain, matched 640MHz amplifier to drive local oscillator 640MHz to 7dBm power. To generate 640MHz oscillator, we use two methods to achieve it. One use a stable, precision 40MHz multiply 4 times and cascade BPF to reject high order harmonics and fundamental signal to get 640MHz. In this method, we design a module that power is 7dBm, phase noise is -104dB(10KHz offset). In another method, we design a common Emitter VCO and program synthesizer to generate a high Q, lower phase noise 640MHz oscillator. For this method, we also design a module that power is 7.5dBm, phase noise is -104dBc/Hz(10KHz offset).